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[dev] Derive the fixed packed P2P shape in the interleaved schedule - #7483

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yaox12 merged 1 commit into
NVIDIA:devfrom
HaochenYuan:fix_p2p_fixed_shape
Sep 20, 2026
Merged

yaox12 merged 1 commit into
NVIDIA:devfrom
HaochenYuan:fix_p2p_fixed_shape

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What does this PR do?

#7000 added pipeline_p2p_fixed_shape to skip the per-transfer shape handshake for packed (THD) sequences padded to max_seqlen_per_dp_cp_rank, but rejected it under virtual pipeline parallelism: forward_backward_pipelining_with_interleaving sized its receive buffers from seq_length // cp_size × micro_batch_size instead of calling get_tensor_shapes(), so skipping the handshake would post mismatched irecv buffers.

This PR makes the interleaved schedule derive the same fixed packed shape as get_tensor_shapes() — [max_seqlen_per_dp_cp_rank, 1, hidden_dim], then the sequence-parallel split — when variable_seq_lengths and pipeline_p2p_fixed_shape, and removes the VPP rejection (and its layout-derived re-check in TransformerConfig). The two #7000 tests that asserted the rejection now assert acceptance.

Validation

  • DSv4 hybrid (mHC, DSA, MoE) PP2×VPP2 THD proxy, eager and TE CUDA graphs: runs with the flag, losses in band with the flag-less runs; step time −6% (eager) / −3.5% (graphs).
  • 128 GPUs, PP2×VPP4, CP64, 1M tokens: 50 iterations, no NaN, 1074 TFLOP/s/GPU vs 1059 without the flag.

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Signed-off-by: HaochenYuan <haocheny@nvidia.com>
@yaox12
yaox12 added this pull request to the merge queue Sep 20, 2026
Merged via the queue into NVIDIA:dev with commit d1ab53b Sep 20, 2026
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This branch was previously deployed

2 inactive deployments
public — ae3fc707 Deployed Sep 18, 2026 by copy-pr-bot[bot] via finalize / publish-docs #9576
test — ae3fc707 Deployed Sep 18, 2026 by copy-pr-bot[bot] via cicd-wait-in-queue #22104
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2 participants