Bump HRX: llama.cpp e57beb9721af (HIP plumbing hook, HRX fixes, Flash-Next)

[bong-water-water-bong]

Moves our HRX llama.cpp fork pin to the current branch tip; hrx-system is unchanged.

	from	to
third_party/llama.cpp (1bit-MONSTER/llama.cpp 1bit/hrx-vulkan-patched)	2e5fcf56a24d	e57beb9721af
third_party/hrx-system (ROCm/hrx-system)	51b1739ae5fd	51b1739ae5fd

What the new pin brings (fork PRs #81, #82, #83, #86, #87, #88):

• ggml-hrx/hip/: HIP-through-HRX plumbing and the GGML_HRX_HIP_ADDON_DIR hook that -DONEBIT_GPU_PRIVATE (Build option for private HIP kernels on HRX (-DONEBIT_GPU_PRIVATE) #307) requires; cmake/hrx.cmake currently fails on this pin check, so Build option for private HIP kernels on HRX (-DONEBIT_GPU_PRIVATE) #307 is only usable after this bump.
• The f32_f32 WMMA cores accumulate in f32 (HRX WMMA cores accumulate in f16: K x small-weight sums drift (+17% at K=2816) #284).
• Deferred host writebacks are published before a host-staging upload (HRX: wrong values when SWIGLU_OAI runs on HRX after a CPU-placed MUL_MAT_ID in a multi-split graph; hidden by per-op sync #286).
• MTP bridges the previous h-row into a fresh sequence (MTP: context checkpoints make repeated identical requests give results that alternate every other request #290).
• The sleeping wait no longer oversleeps decode after a prompt (decode after prefill in one process was slow).
• Qwen3.8-Flash-Next (qwen4exp) on HRX, with the NextN/MTP draft head and lazy tensor reads from upstream.

Registry: regenerated at the new pin (tools/registry_build.py, --check-pins passes): 290 -> 292 mapped architectures (Qwen4ExpForCausalLM, Qwen4ExpForConditionalGeneration -> qwen4exp).

Issues: #284, #286, #290 — fixes verified in the fork PRs; the closing comments follow the engine-side e2e below.

CI here builds without HRX. Before merging, on Strix Halo:
cmake -B build -G Ninja -DONEBIT_HRX=ON && cmake --build build --target onebit && tests/hrx_lemonade_e2e.sh build/1bit build/hrx/llama/bin/llama-server
— queued behind the current GPU sweep on strixhalo; evidence will be posted here. Release is held: merge only on the owner's word.

🤖 Generated with Claude Code

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Commit fc9502c

[bong-water-water-bong]

CI fix (fc9502c): registry_pins failed because the registry was generated before the gitlink was committed (sources still said 2e5fcf56); regenerated. device_route used qwen4exp as its "architecture our llama.cpp does not build" example — at this pin Flash-Next runs on HRX, so the test now checks it takes the plain route and keeps zamba2 as the refused example. Docs that listed qwen4exp as unbuilt (lemonade.md, hrx.md, registry.md, serve.md) say it is back.

Verified on Strix Halo at 1b13c6b (performance mode, 120 W cap, max Tctl 66 °C), fresh clone ~/wt/pin311, third_party/llama.cpp = e57beb9721af:

• cmake -B build -G Ninja -DONEBIT_HRX=ON + --target onebit: rc 0, 30/30 steps. Two new warnings from the HIP plumbing: -MF ….hsaco.d is an unused argument on the hsaco clang++ step (harmless; hsaco depfiles don't track headers) — fork follow-up.
• -DONEBIT_GPU_PRIVATE=<gpu-kernels checkout> configures: ONEBIT_HRX: private HIP kernels from …/addons/hip-hrx (the hook Build option for private HIP kernels on HRX (-DONEBIT_GPU_PRIVATE) #307 needs is at this pin).
• tests/serve_e2e.sh <1bit> Qwen3-0.6B-Q4_K_M hrx: PASS ×2 at this pin, PASS ×2 at the old pin, identical output. (tests/hrx_lemonade_e2e.sh in the description no longer exists; serve_e2e.sh replaced it.)
• Greedy known-answer probe (llama-server HRX0, 64 tokens, 3 requests × 2 rounds per pin): all 12 replies bit-identical across runs and between pins.
• llama-bench HRX0 Qwen3-0.6B: pp512 21217 / 21036 (new) vs 21249 / 21245 (old); tg128 324.7 / 323.1 vs 324.7 / 324.4 — within noise.

Release is held; not merging without the owner's word.