Define explicit atomic memory operations and ordering #920

Motivation

No Wave atomic load/store/RMW or memory-order API was found in inspected compiler/std sources. Rust atomics used by compiler tooling do not provide Wave-language atomics.

Scope

Decide widths, alignment, ordering, target support and unsupported diagnostics. Avoid hidden lock-based fallbacks unless explicitly selected. Separate this design from volatile device access.

Completion criteria

• Approve operation set, widths/alignment and the memory-order contract.
• Specify target capability reporting and whether any explicit fallback is permitted.
• Validate generated ordering/RMW operations, concurrency behavior and invalid-order diagnostics.

Design required. Please mention @LunaStev to discuss the design before starting implementation.