fix(encoder): bounds-check LDR/STR imm12 offset — close the wrong-address class (#259)#261
Merged
Merged
Conversation
…ress class (#259) gale #259: the eight thumb32 load/store immediate-offset encoders (encode_thumb32_ldr/str/ldrb_imm/ldrsb_imm/ldrh_imm/ldrsh_imm/strb_imm/strh_imm) masked `offset & 0xFFF` and emitted unconditionally — for offset >= 0x1000 the access silently targeted the wrong address (offset & 0xFFF). Same class as #253 (ADD/SUB) and #255 (CMP/ADDS/SUBS). Fix: a shared `check_ldst_imm12` guard — error for offset > 0xFFF (the imm12 range is 0..=4095), forcing the selector to use register-offset addressing, rather than silently wrap. Closes the load/store wrong-address class. Liveness: probing `i32.load offset=5000` compiles successfully (no Err) — the selector already materializes large offsets and never feeds the imm12 encoders >= 0x1000, so this is DEFENSIVE hardening (matching gale's note), not a live breakage. GATE: clippy clean; backend suite passes; the three frozen fixtures are BYTE-IDENTICAL between this change and main (control_step / flight_seam_flat / div_const .o compared with `cmp` — the guard only adds an error path for offset > 0xFFF, unreachable by the fixtures). Test ldst_imm12_offset_errors_when_out_of_range. NOTE: the /tmp/armv differential venv lost its `wasmtime` module (tooling regression, unrelated to this change) — verified via byte-comparison instead, which is strictly stronger than the result-level differential here. Closes #259. Part of #242. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Closes #259 (gale). The 8 thumb32 load/store immediate-offset encoders masked offset and 0xFFF and emitted unconditionally — for offset >= 0x1000 the access silently targeted the wrong address. Same class as #253 (ADD/SUB) and #255 (CMP/ADDS/SUBS).
Fix: shared check_ldst_imm12 guard on all 8 — error for offset > 4095, forcing register-offset addressing instead of silently wrapping.
Liveness: i32.load offset=5000 compiles fine (no Err) — the selector already materializes large offsets, so this is defensive hardening (per gale's note), not a live breakage.
Gate: clippy clean; backend suite passes; the 3 frozen fixtures are BYTE-identical between this change and main (cmp on the .o files — the guard only adds an error path unreachable by the fixtures). Test ldst_imm12_offset_errors_when_out_of_range. (The /tmp/armv differential venv lost wasmtime — a tooling regression — so verified via byte-comparison, strictly stronger here.)
Part of #242.