opt: repair + re-enable the optimized linear-memory path (root-cause the MemLoad ADD-register corruption)

[avrabe]

Follow-up to #178 (mitigated in PR #179 by declining linear-memory ops to select_with_stack).

What to fix

The optimized ir_to_arm MemLoad/MemStore lowering emits ADD R12, R12, Raddr; LDR Rd, [R12, #offset], but the actual output has the ADD with garbage registers (e.g. adds r4, r5, r1), dropping the address operand — for both dynamic and constant addresses. Root-cause why the hardcoded Reg::R12/r_addr ADD comes out remapped/garbled (a register-allocation or peephole interaction is the prime suspect; note issue_104 store-load tests passed, so some patterns worked — the divergence is a clue).

Done when

• Optimized linear-memory load/store uses the address operand correctly (matches select_with_stack semantics).
• The is_linear_memory_op decline in optimize_full (PR fix(opt): decline linear-memory ops — optimized path miscompiled addresses (#178) #179) is removed.
• The #[ignore]d issue_104_i32_loadstore_cse tests are re-enabled and pass.
• A correctness test compares optimized vs --no-optimize output for representative memory patterns.

Until then, memory-using modules compile correctly but unoptimized (the PR #179 fallback).