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Pull requests: phanrahan/magma

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Pull requests list

[Circuit] Support mutable IO
#1351 opened Jan 26, 2024 by rsetaluri Collaborator Loading…
2
[Mantle] Init ice40 primitives
#1302 opened Aug 8, 2023 by leonardt Collaborator • Draft
[CompileGuard] Fix CompileGuardSelect
#1294 opened Jul 27, 2023 by rsetaluri Collaborator Loading…
4
[Debug] Add sub flags to config logic, enable uinspect for circuit defs
#1223 opened Jan 9, 2023 by leonardt Collaborator Loading…
1
[MLIR] Add option to emit muxes as if-then-else
#1220 opened Jan 4, 2023 by rsetaluri Collaborator Loading…
2
Remove Python and CoreIR simulators
#1208 opened Dec 6, 2022 by rsetaluri Collaborator Loading…
Debug generator rewriter
#1206 opened Dec 6, 2022 by leonardt Collaborator • Draft
1
[FromVerilog] Add support for netlists in Pyverilog importer
#1186 opened Nov 16, 2022 by rsetaluri Collaborator • Draft
[Primitives] Add default=None for list_lookup
#1154 opened Oct 12, 2022 by leonardt Collaborator Loading…
6
[Primitives] Fix slice primitives
#1139 opened Sep 14, 2022 by leonardt Collaborator Loading…
8
[Types] Support wiring Bit and Bits[1]
#1070 opened May 9, 2022 by leonardt Collaborator Loading…
5
Fix generator debug_info generation
#973 opened Jun 29, 2021 by rsetaluri Collaborator Loading…
3
Add wire in sequential test
#958 opened May 25, 2021 by leonardt Collaborator • Draft
1
Get inst verilog
#953 opened May 12, 2021 by leonardt Collaborator • Draft
@leonardt @rsetaluri
Refactor implicit coercion logic
#855 opened Sep 24, 2020 by leonardt Collaborator Loading…
1
3
Add blackbox and stub passes
#702 opened May 26, 2020 by rsetaluri Collaborator Loading…
6
Memoize first clock type of defn
#685 opened Apr 15, 2020 by rsetaluri Collaborator Loading…
5
Enforce Unique Names
#496 opened Nov 15, 2019 by jameshegarty Collaborator Loading…
8
added hierarchy test with custom env
#486 opened Nov 8, 2019 by rdaly525 Collaborator Loading…
ProTip! Updated in the last three days: updated:>2026-04-14.