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Tune M1 quantized matmul dispatch for six-row large shapes - #4629
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zcbenz merged 2 commits intoOct 6, 2026
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Summary
For
applegpu_g13s, keep large (D > 4096,O > 4096) affine quantized matmul inputs on the QMV path through six rows by changing the matrix-dispatch boundary from 6 to 7.This is intentionally limited to the measured M1
g13sarchitecture and leaves every other architecture/shape threshold unchanged. It does not add or modify a Metal kernel.The PR also adds a reproducible paired benchmark for the row-dispatch boundary.
Why
On an M1 Max with affine 4-bit/group-64 weights at
K=5376,N=8192, the existing six-row matrix dispatch was consistently slower than a QMV control. Five independent 40-trial baseline runs measured chunked-QMV/direct ratios:The five-row same-route calibration median was
1.0052, which bounds local paired timing bias.A final 100-trial run produced:
The direct six-row primitive decreased by about 12% in this isolated run. Across seven 200-trial runs, the baseline six-row chunk/direct median was
0.8807; after the threshold change it was1.0118, showing the direct full-row QMV route aligns with the QMV control.These are isolated primitive measurements, not end-to-end model or TTFT claims.
Reproduction
Validation
python/tests/test_quantized.py: 51 passed, 1 skippedrtol=0.01,atol=0.06)The full Python suite ran 943 tests; 4 unrelated
test_fast_sdpa.py::test_sdpa_vector_head_dim_512cases fail on this M1 Max because the kernels request 1024 threads while the device reports 640/832 maximum. The same failure reproduces on an unmodified build of the base revision.