Add Intel WebGPU subgroup-matrix MatMul implementation

[Jie Chen (jchen10)]

• Add an Intel-specific F16 MatMul path built on the 8x16x16 subgroup-matrix config (Xe2/Xe3). A and B are loaded directly from global memory with no prepacking, and results are written through workgroup scratch with bounds-checked stores, so M and N may be any size while only K must be a multiple of 16. The impl is created in MatMul::PrePackInternal and dispatched from Compute when the device reports the required config.
• The tile shape and split-K factor are chosen per call rather than fixed: TileM in {8,16,32,64}, TileN in {16,32,64}, and split-K to top up occupancy, sized to the device's resident subgroups. The WGSL kernel is parameterized by sg_mat_count_m/n and split_k, emitting the needed subgroup-matrix accumulators via generation-time guards.
• An optional offline-tuned config table (generated from an autotuner sweep) can override the heuristic; selection precedence is tuned table > heuristic.
• Adds MatMul subgroup-matrix unit tests covering tile selections and partial/large non-aligned dims.

[Jie Chen (jchen10)]

Jiajia Qin (@qjia7) PTAL

[Copilot]

Pull request overview

This PR adds an Intel-specific WebGPU MatMul fast-path that uses the Chromium experimental subgroup-matrix feature (8x16x16 F16 config) for Xe2/Xe3 GPUs, with adaptive tile/split-K selection and optional baked-in tuned configs.

Changes:

• Introduces an Intel subgroup-matrix MatMul implementation (WGSL template + C++ dispatch/config selection) and wires it into WebGPU MatMul via a vendor opt-impl hook.
• Adds Intel device-info helpers for architecture-based occupancy heuristics and subgroup-matrix capability detection.
• Adds new MatMul tests intended to exercise the subgroup-matrix path across representative tile/split-K/edge cases.

Reviewed changes

Copilot reviewed 4 out of 10 changed files in this pull request and generated 1 comment.

Show a summary per file

File	Description
onnxruntime/test/providers/cpu/math/matmul_test.cc	Adds a new fp16 MatMul test suite aimed at covering subgroup-matrix tile/split-K behavior.
onnxruntime/core/providers/webgpu/vendor/intel/math/subgroup_matrix_matmul.wgsl.template	Adds the parameterized WGSL subgroup-matrix MatMul kernel template with optional split-K reduction.
onnxruntime/core/providers/webgpu/vendor/intel/math/subgroup_matrix_matmul.h	Declares the Intel subgroup-matrix MatMul program/impl factory and related constants.
onnxruntime/core/providers/webgpu/vendor/intel/math/subgroup_matrix_matmul.cc	Implements config selection (tuned table + heuristic) and the WebGPU dispatch path for subgroup-matrix MatMul.
onnxruntime/core/providers/webgpu/vendor/intel/intel_device_info.h	Declares Intel adapter helpers for subgroup occupancy estimation and subgroup-matrix config support checks.
onnxruntime/core/providers/webgpu/vendor/intel/intel_device_info.cc	Implements Intel architecture-to-occupancy mapping and config enumeration checks.
onnxruntime/core/providers/webgpu/math/matmul.h	Adds a MatMul optimized-implementation abstraction and cached implementation pointer.
onnxruntime/core/providers/webgpu/math/matmul.cc	Dispatches to the vendor optimized impl when present and instantiates it during PrePackInternal.
onnxruntime/contrib_ops/webgpu/quantization/subgroup_matrix_matmul_nbits.cc	Refactors Intel occupancy logic to use the new HwSubgroups helper.

[Jiajia Qin (qjia7)]

Nice work — the kernel is well-structured and the tile/split-K selection is thoughtful.

One higher-level suggestion on the overall structure: most of this implementation isn't actually Intel-specific and could live in the common WebGPU MatMul area. The WGSL template is already parameterized over the subgroup-matrix dims (sg_mat_m/n/k), tile counts (sg_mat_count_m/n), split_k, and has_bias, and it relies solely on standard subgroup-matrix builtins (subgroupMatrixLoad / subgroupMatrixMultiplyAccumulate / subgroupMatrixStore) — nothing here is tied to Intel.

I'd suggest moving the template, SubgroupMatrixMatMulProgram / GenerateShaderCode, and the dispatch mechanics into a common path, leaving only the genuinely vendor-specific pieces here: the tile/split-K selection (SgMatMulConfig, HeuristicConfig, HwSubgroups, the pretuned .inc table) and the capability detection. The common launcher would take (sg_mat_m/n/k, tile_m, tile_n, split_k) from a vendor-supplied config provider. We can keep it enabled only for Intel devices for now, while leaving the door open for other backends to reuse the same kernel in the future by plugging in their own config selection.

[Copilot]

Pull request overview

Copilot reviewed 9 out of 14 changed files in this pull request and generated 1 comment.

[Hariharan Seshadri (hariharans29)]

LGTM

[Jie Chen (jchen10)]

Hariharan Seshadri (@hariharans29) Jiajia Qin (@qjia7) Thanks for reviewing!
Just rebased and squashed the commits of this PR.

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[Jie Chen (jchen10)]

The CI failures look irrelevant to this PR. Hariharan Seshadri (@hariharans29) I'd appreciate your perspective, thanks!

[Hariharan Seshadri (hariharans29)]

The CI failures look irrelevant to this PR. Hariharan Seshadri (@hariharans29) I'd appreciate your perspective, thanks!

Hmm - Yes, I think so. I just kicked off re-runs just to be sure. I should be able to merge later.

EDIT: It looks like a lot of other PRs are also affected. I ll just merge considering it is not a requied check and it is unrelated to the changes here.