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[flang][CUDA] Emit ignore_denormal_mode for CUDA Fortran atomicadd - #232726
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chsigg merged 2 commits intoOct 18, 2026
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@llvm/pr-subscribers-flang-fir-hlfir Author: Christian Sigg (chsigg) ChangesFull diff: https://github.com/llvm/llvm-project/pull/232726.diff 3 Files Affected:
diff --git a/flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp b/flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
index e979bbc44af98f..4e61335079711e 100644
--- a/flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
+++ b/flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
@@ -687,8 +687,11 @@ static mlir::Value genAtomBinOp(fir::FirOpBuilder &builder, mlir::Location &loc,
mlir::Value arg1) {
auto llvmPointerType = mlir::LLVM::LLVMPointerType::get(builder.getContext());
arg0 = builder.createConvert(loc, llvmPointerType, arg0);
- return mlir::LLVM::AtomicRMWOp::create(builder, loc, binOp, arg0, arg1,
- mlir::LLVM::AtomicOrdering::seq_cst);
+ bool ignoreDenormalMode = binOp == mlir::LLVM::AtomicBinOp::fadd;
+ return mlir::LLVM::AtomicRMWOp::create(
+ builder, loc, binOp, arg0, arg1, mlir::LLVM::AtomicOrdering::seq_cst,
+ /*syncscope=*/llvm::StringRef(), /*alignment=*/0, /*isVolatile=*/false,
+ /*ignoreDenormalMode=*/ignoreDenormalMode);
}
// ATOMICADD
diff --git a/flang/test/Lower/CUDA/cuda-atomicadd.cuf b/flang/test/Lower/CUDA/cuda-atomicadd.cuf
index dff029d33930d4..39e5a56808a707 100644
--- a/flang/test/Lower/CUDA/cuda-atomicadd.cuf
+++ b/flang/test/Lower/CUDA/cuda-atomicadd.cuf
@@ -8,7 +8,7 @@ attributes(global) subroutine test_atomicaddvector_r2()
end subroutine
! CHECK-LABEL: func.func @_QPtest_atomicaddvector_r2() attributes {cuf.proc_attr = #cuf.cuda_proc<global>{{.*}}}
-! CHECK: llvm.atomicrmw fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, vector<2xf16>
+! CHECK: llvm.atomicrmw ignore_denormal_mode fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, vector<2xf16>
attributes(global) subroutine test_atomicaddvector_r4()
real(4), device :: a(2), tmp1(2), tmp2(2)
@@ -16,7 +16,7 @@ attributes(global) subroutine test_atomicaddvector_r4()
end subroutine
! CHECK-LABEL: func.func @_QPtest_atomicaddvector_r4() attributes {cuf.proc_attr = #cuf.cuda_proc<global>{{.*}}}
-! CHECK: llvm.atomicrmw fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, vector<2xf32>
+! CHECK: llvm.atomicrmw ignore_denormal_mode fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, vector<2xf32>
attributes(global) subroutine test_atomicadd_r2x4()
real(4), device :: a(2), tmp1(2), tmp2(2)
@@ -24,7 +24,7 @@ attributes(global) subroutine test_atomicadd_r2x4()
end subroutine
! CHECK-LABEL: func.func @_QPtest_atomicadd_r2x4() attributes {cuf.proc_attr = #cuf.cuda_proc<global>{{.*}}}
-! CHECK: llvm.atomicrmw fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, vector<2xf32>
+! CHECK: llvm.atomicrmw ignore_denormal_mode fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, vector<2xf32>
attributes(global) subroutine test_atomicadd_r4x4()
real(4), device :: a(4), tmp1(4), tmp2(4)
@@ -33,3 +33,27 @@ end subroutine
! CHECK-LABEL: func.func @_QPtest_atomicadd_r4x4() attributes {cuf.proc_attr = #cuf.cuda_proc<global>{{.*}}}
! CHECK: atom.add.v4.f32
+
+attributes(global) subroutine test_atomicadd_r4()
+ real(4), device :: a, tmp1, tmp2
+ tmp1 = atomicadd(a, tmp2)
+end subroutine
+
+! CHECK-LABEL: func.func @_QPtest_atomicadd_r4() attributes {cuf.proc_attr = #cuf.cuda_proc<global>{{.*}}}
+! CHECK: llvm.atomicrmw ignore_denormal_mode fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f32
+
+attributes(global) subroutine test_atomicadd_r8()
+ real(8), device :: a, tmp1, tmp2
+ tmp1 = atomicadd(a, tmp2)
+end subroutine
+
+! CHECK-LABEL: func.func @_QPtest_atomicadd_r8() attributes {cuf.proc_attr = #cuf.cuda_proc<global>{{.*}}}
+! CHECK: llvm.atomicrmw ignore_denormal_mode fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f64
+
+attributes(global) subroutine test_atomicadd_i4()
+ integer(4), device :: a, tmp1, tmp2
+ tmp1 = atomicadd(a, tmp2)
+end subroutine
+
+! CHECK-LABEL: func.func @_QPtest_atomicadd_i4() attributes {cuf.proc_attr = #cuf.cuda_proc<global>{{.*}}}
+! CHECK: llvm.atomicrmw add %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i32
diff --git a/flang/test/Lower/CUDA/cuda-device-proc.cuf b/flang/test/Lower/CUDA/cuda-device-proc.cuf
index a1c3c33a76811d..b9081681569be9 100644
--- a/flang/test/Lower/CUDA/cuda-device-proc.cuf
+++ b/flang/test/Lower/CUDA/cuda-device-proc.cuf
@@ -123,9 +123,9 @@ end
! CHECK: %{{.*}} = nvvm.barrier.reduction #nvvm.reduction<or> %[[CONV]] -> i32
! CHECK: %{{.*}} = llvm.atomicrmw add %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i32
! CHECK: %{{.*}} = llvm.atomicrmw add %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i64
-! CHECK: %{{.*}} = llvm.atomicrmw fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f32
-! CHECK: %{{.*}} = llvm.atomicrmw fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f64
-! CHECK: %{{.*}} = llvm.atomicrmw fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, vector<2xf16>
+! CHECK: %{{.*}} = llvm.atomicrmw ignore_denormal_mode fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f32
+! CHECK: %{{.*}} = llvm.atomicrmw ignore_denormal_mode fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, f64
+! CHECK: %{{.*}} = llvm.atomicrmw ignore_denormal_mode fadd %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, vector<2xf16>
! CHECK: %{{.*}} = llvm.atomicrmw sub %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i32
! CHECK: %{{.*}} = llvm.atomicrmw sub %{{.*}}, %{{.*}} seq_cst : !llvm.ptr, i64
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This restores the strict FTZ default originally introduced in #200732 and temporarily relaxed in #206154. Frontends can now explicitly opt in to native FTZ-mismatched atomics on a per-instruction basis using `!atomic.ignore.denormal.mode` metadata (#217585, #217586, #217587, #217588, #232725, #232726), which is supported in Clang, Flang, MLIR, and XLA. Users who need the previous behavior globally can still pass `-nvptx-allow-ftz-atomics=true`. Update test cases to verify the new default disallow behavior.
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…31429) This restores the strict FTZ default originally introduced in llvm#200732 and temporarily relaxed in llvm#206154. Frontends can now explicitly opt in to native FTZ-mismatched atomics on a per-instruction basis using `!atomic.ignore.denormal.mode` metadata (llvm#217585, llvm#217586, llvm#217587, llvm#217588, llvm#232725, llvm#232726), which is supported in Clang, Flang, MLIR, and XLA. Users who need the previous behavior globally can still pass `-nvptx-allow-ftz-atomics=true`. Update test cases to verify the new default disallow behavior.
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CUDA Fortran
atomicaddhas the same device semantics as CUDA C++atomicAdd(), targeting PTXatom.add(which flushes f32 denormals to zero on global memory).Set
ignore_denormal_modeonmlir::LLVM::AtomicRMWOpwhen lowering CUDA Fortranatomicaddfor floating-point types ingenAtomBinOp, matching Clang's CUDA/HIPatomicAddlowering (#217587) so it continues to emit nativeatom.add.f32when-nvptx-allow-ftz-atomicsdefaults tofalse(#231429).