Skip to content

AMDGPU: Fix gcc build break#161354

Merged
petar-avramovic merged 1 commit into
mainfrom
users/petar-avramovic/fix-gcc-build
Sep 30, 2025
Merged

AMDGPU: Fix gcc build break#161354
petar-avramovic merged 1 commit into
mainfrom
users/petar-avramovic/fix-gcc-build

Conversation

@petar-avramovic

Copy link
Copy Markdown
Contributor

No description provided.

Copy link
Copy Markdown
Contributor Author

This stack of pull requests is managed by Graphite. Learn more about stacking.

@petar-avramovic petar-avramovic marked this pull request as ready for review September 30, 2025 11:22
@llvmbot

llvmbot commented Sep 30, 2025

Copy link
Copy Markdown
Member

@llvm/pr-subscribers-backend-amdgpu

Author: Petar Avramovic (petar-avramovic)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/161354.diff

1 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (+1-1)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 7f08a4eef97c9..134f87c48e507 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -4268,7 +4268,7 @@ Register AMDGPUInstructionSelector::copyToVGPRIfSrcFolded(
 
 InstructionSelector::ComplexRendererFns
 AMDGPUInstructionSelector::selectIgnore(MachineOperand &Root) const {
-  return {{}};
+  return {{[=](MachineInstrBuilder &MIB) {}}};
 }
 
 ///

@petar-avramovic petar-avramovic force-pushed the users/petar-avramovic/fix-gcc-build branch from ffd055c to fccedef Compare September 30, 2025 11:26
return {{}};
// Don't render anything.
ComplexRendererFns Renderers;
Renderers.emplace();

Copy link
Copy Markdown
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Don't need this part?

Copy link
Copy Markdown
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

get
LLVM ERROR: cannot select: G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.s.barrier.leave), 1 (in function: kernel1)
without it

petar-avramovic commented Sep 30, 2025

Copy link
Copy Markdown
Contributor Author

Merge activity

  • Sep 30, 12:00 PM UTC: A user started a stack merge that includes this pull request via Graphite.
  • Sep 30, 12:01 PM UTC: @petar-avramovic merged this pull request with Graphite.

@petar-avramovic petar-avramovic merged commit 1553b3d into main Sep 30, 2025
9 checks passed
@petar-avramovic petar-avramovic deleted the users/petar-avramovic/fix-gcc-build branch September 30, 2025 12:01
@llvm-ci

llvm-ci commented Sep 30, 2025

Copy link
Copy Markdown

LLVM Buildbot has detected a new failure on builder llvm-clang-x86_64-gcc-ubuntu running on sie-linux-worker3 while building llvm at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/174/builds/25286

Here is the relevant piece of the build log for the reference
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: tools/llvm-exegesis/RISCV/rvv/filter.test' FAILED ********************
Exit Code: 2

Command Output (stdout):
--
# RUN: at line 1
/home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/llvm-exegesis -mtriple=riscv64 -mcpu=sifive-x280 -benchmark-phase=assemble-measured-code --mode=inverse_throughput --opcode-name=PseudoVNCLIPU_WX_M1_MASK     --riscv-filter-config='vtype = {VXRM: rod, AVL: VLMAX, SEW: e(8|16), Policy: ta/mu}' --max-configs-per-opcode=1000 --min-instructions=10 | /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/FileCheck /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
# executed command: /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/llvm-exegesis -mtriple=riscv64 -mcpu=sifive-x280 -benchmark-phase=assemble-measured-code --mode=inverse_throughput --opcode-name=PseudoVNCLIPU_WX_M1_MASK '--riscv-filter-config=vtype = {VXRM: rod, AVL: VLMAX, SEW: e(8|16), Policy: ta/mu}' --max-configs-per-opcode=1000 --min-instructions=10
# .---command stderr------------
# | PseudoVNCLIPU_WX_M1_MASK: Failed to produce any snippet via: instruction has tied variables, avoiding Read-After-Write issue, picking random def and use registers not aliasing each other, for uses, one unique register for each position
# `-----------------------------
# executed command: /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/FileCheck /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
# .---command stderr------------
# | FileCheck error: '<stdin>' is empty.
# | FileCheck command line:  /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/build/bin/FileCheck /home/buildbot/buildbot-root/llvm-clang-x86_64-gcc-ubuntu/llvm-project/llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test
# `-----------------------------
# error: command failed with exit status: 2

--

********************


mahesh-attarde pushed a commit to mahesh-attarde/llvm-project that referenced this pull request Oct 3, 2025
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Projects

None yet

Development

Successfully merging this pull request may close these issues.

5 participants