[LoopVectorizer][NFC] Require asserts on maxbandwidth-regpressure.ll

[NickGuy-Arm]

Fix for buildbot failure: https://lab.llvm.org/buildbot/#/builders/11/builds/19837

[llvmbot]

@llvm/pr-subscribers-llvm-transforms

Author: Nicholas Guy (NickGuy-Arm)

Changes

Fix for buildbot failure: https://lab.llvm.org/buildbot/#/builders/11/builds/19837

---

Full diff: https://github.com/llvm/llvm-project/pull/149484.diff

1 Files Affected:

• (modified) llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll (+1)

diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll b/llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
index ce639f9150078..2d1543185098f 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: opt -passes=loop-vectorize -vectorizer-maximize-bandwidth -debug-only=loop-vectorize -disable-output -force-vector-interleave=1 -enable-epilogue-vectorization=false -S < %s 2>&1 | FileCheck %s --check-prefixes=CHECK-REGS-VP
 ; RUN: opt -passes=loop-vectorize -vectorizer-maximize-bandwidth -debug-only=loop-vectorize -disable-output -force-target-num-vector-regs=1 -force-vector-interleave=1 -enable-epilogue-vectorization=false -S < %s 2>&1 | FileCheck %s --check-prefixes=CHECK-NOREGS-VP
 

[fhahn]

LGTM, thanks.

If possible, it might be preferable to use remarks, but one might be missing for register pressure.