[Synth] Add declarative cut rewrite pattern and yield op

[okekayode]

Concerns #10485

We introduce the declarative operation synth.cut_rewrite_pattern and also the terminator operation synth.yield.

synth.cut_rewrite_pattern denotes cut rewrite patterns for i1 input and result types as function-shaped regions. We also implement a custom printer and parser with attribute support for synth.mapping_cost.

In this PR we only introduce the IR representation; wiring this into consumers, for example TechMapper.cpp, can be added later.

[circt-bot]

Results of circt-tests run for 833947f compared to results for 7aa41cc: no change to test results.

[circt-bot]

Results of circt-tests run for aee47a9 compared to results for 7aa41cc: no change to test results.

[circt-bot]

Results of circt-tests run for 2318e6e compared to results for 7aa41cc: no change to test results.

[uenoku]

LGTM

[circt-bot]

Results of circt-tests run for 030d0a0 compared to results for 7aa41cc: no change to test results.

[circt-bot]

Results of circt-tests run for 8e7d483 compared to results for 7aa41cc: no change to test results.

[circt-bot]

Results of circt-tests run for a4a11d2 compared to results for 7aa41cc: no change to test results.

[circt-bot]

Results of circt-tests run for 62d70f5 compared to results for 7aa41cc: no change to test results.

[okekayode]

@uenoku I reverted the new positional timing arc attribute and added a TODO for the MappingCostAttr long-term representation, so cut_rewrite_pattern is no longer rejects arcs like before in my previous commit.

Moreover, I'd like to do a follow-up PR to move MappingCostAttr towards the nameless delay representation right after, where it is something like this: #synth.mapping_cost<area = 1.0 : f64, delays = [[1, 0], [2, 0]]> where each row concerns to an input position and stores the instrinsic, sensitivity for a single cut-pattern result. Then I'll wire it in.

LMK if that sounds good and I’ll open an issue for it after this PR is sorted. Thanks.

[circt-bot]

Results of circt-tests run for 472b8b3 compared to results for 7aa41cc:

sv-tests

Changes in emitted diagnostics:

• +55 total change
• +22 error: unsupported construct in ClassType members: ConstraintBlock
• +7 error: identifier 'analysis_txn' used before its declaration
• +6 error: no member named 'sprint' in 'm_uvm_printer_knobs'
• +3 error: parentheses are required when invoking function 'get_status'
• +3 error: value of type 'T' (aka 'uvm_sequence_base') cannot be assigned to type 'simple_seq'
• +3 error: virtual method 'sample' is 'public' but declared 'protected' in superclass method
• +2 error: time scale declaration must come before all other items in scope
• -1 error: unknown module 'BUFGCE'
• +1 error: unknown macro or compiler directive '`uvm_sequence_utils'
• +1 error: unknown macro or compiler directive '`uvm_sequencer_utils'
• +1 error: unknown module 'pss'
• +1 error: unknown module 'pss_wrapper'
• +1 error: unknown module 'spi_clgen'
• +1 error: unknown module 'spi_shift'
• +1 error: unsupported format specifier `%c`
• +1 error: use of undeclared identifier 'CONTROL'
• +1 error: use of undeclared identifier 'count'
• +1 error: value of type 'T' (aka 'uvm_sequencer') cannot be assigned to type 'simple_sequencer'

[uenoku]

Could you follow up on this? I think we want to make delay/arc somewhat required for each patterns, even when they want to use depth driven by BooleanLogicOpInterface.

[uenoku]

Sorry for the delayed review, thank you!