Skip to content

IRToASTVisitor: handle fixed-vector insertion, extraction and shuffle #350

Open

Description

@humdrum00001010

A valid fixed-width LLVM insertelement instruction is rejected before C
emission. extractelement and shufflevector also lack instruction visitors.

Standalone synthetic example:

define i64 @byte_insert_constant(i64 %bits, i8 %value) {
  %v = bitcast i64 %bits to <8 x i8>
  %updated = insertelement <8 x i8> %v, i8 %value, i32 3
  %result = bitcast <8 x i8> %updated to i64
  ret i64 %result
}
rellic-decomp --unstructured --input vector-lane-module.ll --output vector-lane-module.c
clang --target=i686-pc-windows-msvc -std=c2x -O2 -c vector-lane-module.ll -o original.obj
clang --target=i686-pc-windows-msvc -std=c2x -O2 -c vector-lane-module.c -o rebuilt.obj

Observed failure: Instruction not supported: insertelement <8 x i8>.
Expected: recompilable C preserving the original input vector, selected
lane, shuffle indices and exact memory-access byte counts.

The generic implementation copies the input vector into a temporary for
insertion, uses vector subscripting for extraction, and emits
__builtin_shufflevector for shuffle masks. Vector operations with align 1
need byte-count compiler-builtin memory copies instead of naturally aligned
C vector-pointer dereferences; otherwise recompilation can replace
movups/movdqu with alignment-requiring movaps/movdqa.

The attached full synthetic module has 14 scalar/pointer-interface exports,
covering constant and masked dynamic indices, byte-vector bitcasts,
reverse/splat/two-input shuffles, different result lengths and unaligned
vector loads/stores. Its whole-DLL comparison covers every export. Six bodies
are byte-identical; seven pairs contain identical instructions reordered;
one uses a different SIMD instruction selection. Those nonexact differences
remain visible and are not presented as semantic-equivalence proof.

Tested at public fork c2b4695dd220ab4249914a8d4d52556e036e9f08
with LLVM/Clang 17.0.6. Upstream 370abaad lacks the three instruction visitors
by source inspection; a clean upstream runtime build is not claimed.
Historical PR #175 added vector types/constants, not these lane visitors.
No exact duplicate was found in the repository issue/PR search.

Standalone full module: https://github.com/humdrum00001010/rellic/blob/054477b0cd245ef0b0e72e4955f674013ff5cb2c/tests/tools/decomp/ir/vector-lane-module.ll

Generic fix: https://github.com/humdrum00001010/rellic/commit/054477b0cd245ef0b0e72e4955f674013ff5cb2c

Activity

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Metadata

Metadata

Assignees

No one assigned

    Labels

    No labels
    No labels

    Type

    No type

    Projects

    No projects

      Milestone

      No milestone

      Relationships

      None yet

      Development

      No branches or pull requests

      Issue actions