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cuda : add BF16 support for XIELU - #29955

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Qiao12-pixel:cuda-bf16-xielu
Oct 6, 2026
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CISC merged 1 commit into
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Qiao12-pixel:cuda-bf16-xielu

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@Qiao12-pixel Qiao12-pixel commented Oct 4, 2026 •

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The XIELU CUDA kernel template is already generic over the element type; only the F32/F16 type assertion and the else-if dispatch were missing. Add the nv_bfloat16 branch to the launcher, and drop the temporary supports_op gate in ggml-cuda.cu that rejected BF16+XIELU.

test-backend-ops gains two BF16 cases ([10,5,4,3] and [512,16,1,1]). docs/ops/CUDA.csv and docs/ops.md are regenerated; the F32 xIELU row flips from no to yes as well, i.e. the previous record was stale.

Tested:

  • Mac CPU: xIELU F32/F16/BF16, 6/6
  • Mac Metal: existing F32/F16, 4/4; BF16 still unsupported
  • RTX 4090 CUDA: xIELU F32/F16/BF16, 6/6
  • RTX 4090 CUDA BF16-only: 2/2
  • git diff --check passes

Overview

Next, I will present the test results of this PR

ggml_cuda_init: found 1 CUDA devices (Total VRAM: 24091 MiB):
Device 0: NVIDIA GeForce RTX 4090, compute capability 8.9, VMM: yes, VRAM: 24091 MiB
Testing 2 devices

Backend 1/2: CUDA0
Device description: NVIDIA GeForce RTX 4090
Device memory: 24091 MB (23699 MB free)

XIELU(type=f32,ne=[10,5,4,3]): SUPPORTED
XIELU(type=f16,ne=[10,5,4,3]): SUPPORTED
XIELU(type=bf16,ne=[10,5,4,3]): SUPPORTED
XIELU(type=f32,ne=[512,16,1,1]): SUPPORTED
XIELU(type=f16,ne=[512,16,1,1]): SUPPORTED
XIELU(type=bf16,ne=[512,16,1,1]): SUPPORTED
Backend CUDA0: OK
Backend 2/2: CPU
Skipping
2/2 backends passed
OK
ggml_cuda_init: found 1 CUDA devices (Total VRAM: 24091 MiB):
Device 0: NVIDIA GeForce RTX 4090, compute capability 8.9, VMM: yes, VRAM: 24091 MiB
Testing 2 devices

Backend 1/2: CUDA0
Device description: NVIDIA GeForce RTX 4090
Device memory: 24091 MB (23699 MB free)

XIELU(type=bf16,ne=[10,5,4,3]): OK
XIELU(type=bf16,ne=[512,16,1,1]): OK
2/2 tests passed
Backend CUDA0: OK
Backend 2/2: CPU
Skipping
2/2 backends passed
OK
root@autodl-container-060c4ba85a-dba89d5f:~/autodl-tmp/llama.cpp# ./build-cuda/bin/test-backend-ops test -b CUDA0 -o XIELU
ggml_cuda_init: found 1 CUDA devices (Total VRAM: 24091 MiB):
Device 0: NVIDIA GeForce RTX 4090, compute capability 8.9, VMM: yes, VRAM: 24091 MiB
Testing 2 devices

Backend 1/2: CUDA0
Device description: NVIDIA GeForce RTX 4090
Device memory: 24091 MB (23699 MB free)

XIELU(type=f32,ne=[10,5,4,3]): OK
XIELU(type=f16,ne=[10,5,4,3]): OK
XIELU(type=bf16,ne=[10,5,4,3]): OK
ggml_backend_cuda_graph_compute: CUDA graph warmup complete
XIELU(type=f32,ne=[512,16,1,1]): OK
XIELU(type=f16,ne=[512,16,1,1]): OK
ggml_backend_cuda_graph_compute: CUDA graph warmup complete
ggml_backend_cuda_graph_compute: CUDA graph warmup complete
XIELU(type=bf16,ne=[512,16,1,1]): OK
6/6 tests passed
Backend CUDA0: OK
Backend 2/2: CPU
Skipping
2/2 backends passed
OK
root@autodl-container-060c4ba85a-dba89d5f:~/autodl-tmp/llama.cpp# ./build-cuda/bin/test-backend-ops support -b CUDA0 -o XIELU --output csv
ggml_cuda_init: found 1 CUDA devices (Total VRAM: 24091 MiB):
Device 0: NVIDIA GeForce RTX 4090, compute capability 8.9, VMM: yes, VRAM: 24091 MiB
"backend_name","op_name","op_params","test_mode","supported","error_message","backend_reg_name"
"CUDA0","XIELU","type=f32,ne=[10,5,4,3]","support","1","yes","CUDA"
"CUDA0","XIELU","type=f16,ne=[10,5,4,3]","support","1","yes","CUDA"
"CUDA0","XIELU","type=bf16,ne=[10,5,4,3]","support","1","yes","CUDA"
"CUDA0","XIELU","type=f32,ne=[512,16,1,1]","support","1","yes","CUDA"
"CUDA0","XIELU","type=f16,ne=[512,16,1,1]","support","1","yes","CUDA"
"CUDA0","XIELU","type=bf16,ne=[512,16,1,1]","support","1","yes","CUDA"

Additional information

Requirements

The XIELU CUDA kernel template is already generic over the element
type; only the F32/F16 type assertion and the else-if dispatch were
missing. Add the nv_bfloat16 branch to the launcher, and drop the
temporary supports_op gate in ggml-cuda.cu that rejected BF16+XIELU.

test-backend-ops gains two BF16 cases ([10,5,4,3] and [512,16,1,1]).
docs/ops/CUDA.csv and docs/ops.md are regenerated; the F32 xIELU row
flips from no to yes as well, i.e. the previous record was stale.

Tested:
- Mac CPU: xIELU F32/F16/BF16, 6/6
- Mac Metal: existing F32/F16, 4/4; BF16 still unsupported
- RTX 4090 CUDA: xIELU F32/F16/BF16, 6/6
- RTX 4090 CUDA BF16-only: 2/2
- git diff --check passes
@Qiao12-pixel
Qiao12-pixel requested review from a team and ggerganov as code owners October 4, 2026 16:30
@github-actions github-actions Bot added documentation Improvements or additions to documentation testing Everything test related ggml changes relating to the ggml tensor library for machine learning CUDA Related to the CUDA backend labels Oct 4, 2026

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I have approved the code, it can be merged

@Qiao12-pixel

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@ggerganov could you help approve the CI workflows and review this BF16 XIELU CUDA support? All test-backend-ops passed on RTX4090 and Mac CPU.

@JohannesGaessler JohannesGaessler added the merge ready A maintainer can use this label to indicate that they consider the changes final and ready to merge. label Oct 6, 2026
@CISC
CISC merged commit 5ad1c5d into ggml-org:master Oct 6, 2026
26 checks passed
edwardyoon pushed a commit to edwardyoon/focus-llama that referenced this pull request Oct 8, 2026
The XIELU CUDA kernel template is already generic over the element
type; only the F32/F16 type assertion and the else-if dispatch were
missing. Add the nv_bfloat16 branch to the launcher, and drop the
temporary supports_op gate in ggml-cuda.cu that rejected BF16+XIELU.

test-backend-ops gains two BF16 cases ([10,5,4,3] and [512,16,1,1]).
docs/ops/CUDA.csv and docs/ops.md are regenerated; the F32 xIELU row
flips from no to yes as well, i.e. the previous record was stale.

Tested:
- Mac CPU: xIELU F32/F16/BF16, 6/6
- Mac Metal: existing F32/F16, 4/4; BF16 still unsupported
- RTX 4090 CUDA: xIELU F32/F16/BF16, 6/6
- RTX 4090 CUDA BF16-only: 2/2
- git diff --check passes

(cherry picked from commit 5ad1c5d)
@BrewTestBot BrewTestBot mentioned this pull request Oct 15, 2026
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