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sycl: add IQ3_S multi-column MMVQ - #29500
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On B60:
| GGUF | Test | fa | Base t/s | Primary t/s | Increase Rate (Primary vs Base) |
|---|---|---|---|---|---|
| Qwen3-30B-A3B-UD-IQ3_XXS.gguf | pp8192 | 0 | 467.21 | 478.42 | 2.40% |
| Qwen3-30B-A3B-UD-IQ3_XXS.gguf | pp8192 | 1 | 616.53 | 636.08 | 3.17% |
| Qwen3-30B-A3B-UD-IQ3_XXS.gguf | tg128 | 0 | 46.83 | 46.79 | -0.09% |
| Qwen3-30B-A3B-UD-IQ3_XXS.gguf | tg128 | 1 | 48.95 | 48.95 | 0.00% |
It's good job!
Thank you!
anantshri
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Oct 7, 2026
Adopt ggml-org#29500's plain IQ3_S multi-column MMVQ verbatim; keep the persistent reorder paths (reordered multicol + single-col decode + reorder-aware prefill dequant) and IQ-quant grouped MoE MMVQ.
edwardyoon
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(cherry picked from commit 78651c4)
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Overview
Port the IQ4_XS switch_ncols path to IQ3_S. Noticed this bottleneck on Qwen3.8-27B IQ3_S-heavy GGUF.
All benchmarked on my local Arc A770
Additional information
Extends #21845 to IQ3_S
Requirements
Footnotes
test-backend-ops test -b SYCL0 -o MUL_MAT -p 'iq3_s'3-run median ↩ ↩2