ggml-cpu: enable tiled flash attention for non-vector-multiple head dims on x86 - #29423
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Sorry @SongXiaoXi, only members of the |
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Hi @am17an, is there anything I can do to get the bot review working or help move this PR forward? |
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Thanks for retrying! It failed with the same |
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Idk. Time to retire the bot. Generated from one that works. Fix this one and it should be good with me. [P2] Soft-capping gives padded KV entries nonzero attention weight — ops.cpp:9323
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…ims on x86 (ggml-org#29423) * ggml-cpu: enable tiled flash attention for non-vector-multiple head dims on x86 * add AVX2 support for masked loading and storing in simd_gemm_ukernel_tail * ggml-cpu: fix FA softcap handling for padded KV tiles
…ims on x86 (ggml-org#29423) * ggml-cpu: enable tiled flash attention for non-vector-multiple head dims on x86 * add AVX2 support for masked loading and storing in simd_gemm_ukernel_tail * ggml-cpu: fix FA softcap handling for padded KV tiles
Overview
The CPU tiled flash attention kernel is gated on the value head size being a multiple of the SIMD vector width. Head sizes like 72 fall back to the per-query kernel, which is an order of magnitude slower and also accumulates P*V in F16.
This PR removes the restriction on 64-bit x86 and handles the leftover columns of the P*V tile GEMM with masked AVX-512 loads/stores/FMA instead of scalar per-column dot products. The behavior is unchanged outside 64-bit x86.
Additional information
FA operator, 16 heads, F16 K/V, Ryzen 9 9950X, 16 threads:
Qwen3-VL BF16 mmproj on CPU:
tested on x86_64 only.
Correctness: 225/225 CPU FA backend tests pass, including a new DK=65/DV=67 case with mask, sinks and ALiBi.
Requirements