CUDA sm_120 (Blackwell, RTX 5090): flash_attn_ext_f16<256,256,32,2> raises "Warp Misaligned Register" device exception — intermittent crash; -fa off works around it #24398

Summary

On an RTX 5090 (sm_120, Blackwell), running google/gemma-4-26B-A4B-it (MXFP4_MOE) with FlashAttention enabled crashes intermittently during decode. A CUDA device coredump names the faulting kernel as flash_attn_ext_f16<256, 256, 32, 2, false, false> with a Warp Misaligned Register exception. Disabling FlashAttention (-fa off) eliminates this crash.

Environment

• GPU: NVIDIA GeForce RTX 5090 Laptop GPU (compute capability 12.0, sm_120, Blackwell)
• Driver: 595.71.05
• OS: Linux 6.17.0 (x86_64)
• CUDA toolkit: 13.3 (nvcc V13.3.33)
• cuBLAS / cuBLASLt: 13.5.1.27
• llama.cpp: commit d749821db, built with -DGGML_CUDA=ON -DCMAKE_CUDA_ARCHITECTURES=120 (Release)
• Model: google/gemma-4-26B-A4B-it, MXFP4_MOE GGUF (MoE, ~4B active params, head_dim 256)

Faulting kernel (CUDA device coredump, cuda-gdb)

CUDA Exception: Warp Misaligned Register
kernel: void flash_attn_ext_f16<256, 256, 32, 2, false, false>(...)
GridDim (64,1,1)  BlockDim (32,4,1)   focus: device 0, sm 10, warp 0, lane 0
=> SASS at faulting PC:  IADD.64 R4, R176, 0x6300   (64-bit address add feeding a misaligned access)

Reproduction

# FlashAttention is ON by default — that is the kernel being triggered.
# TF32 is disabled only to isolate this from a separate cuBLASLt TF32 issue.
NVIDIA_TF32_OVERRIDE=0 ./bin/llama-server -m gemma-4-26B-A4B-it-MXFP4_MOE.gguf -ngl 99 -c 8192 \
  --host 127.0.0.1 --port 8080

Then send repeated long-context (~3k–7k-token) decode requests. The server crashes intermittently, typically between ~40 and ~190 generations, with CUDA error: ... surfaced at ggml_backend_cuda_synchronize. The synchronize is only the async surfacing point; the flash_attn_ext_f16 kernel above is the one that faults (named via coredump).

Proven workaround

Running with -fa off removes this kernel from the path and the crash disappears: 3 independent rounds of 320 long-context generations each (960 total) completed without any flash_attn_ext_f16 fault.

How it was captured

compute-sanitizer serializes execution and the bug vanishes, so a CUDA device coredump was used:

CUDA_ENABLE_COREDUMP_ON_EXCEPTION=1 CUDA_COREDUMP_FILE=core_%p.nvcudmp <run until crash>
cuda-gdb -q -ex "target cudacore core_<pid>.nvcudmp" -ex "info cuda kernels" -ex "bt" -ex "x/3i \$pc"

Coredump retained; cuda-gdb excerpts above. Happy to share more frames or test a patch.

Notes

• This is the head_dim-256 FA kernel with a device-side exception (Warp Misaligned Register), distinct from any clean GGML_ABORT / BEST_FATTN_KERNEL_NONE fallback path.
• One of three distinct sm_120 GPU bugs isolated on this workload (the others: the ggml mul_mat_q<Q8_0> issue CUDA sm_120 (Blackwell, RTX 5090): out-of-range shared-memory store in mul_mat_q<Q8_0,128> MMA write-back epilogue — intermittent crash; eliminated by removing Q8_0 weights #24399, and a cuBLASLt TF32 kernel reported to NVIDIA: https://forums.developer.nvidia.com/t/cublaslt-sm-120-blackwell-tf32-split-k-kernel-nvjet-sm120-tf32-splitk-raises-warp-barrier-arrival-mismatch-intermittent-illegal-memory-a/372787).

Possibly related: #23693 reports garbled output on the flash-attn path on Blackwell — this report is a hard device-side exception (Warp Misaligned Register) on sm_120, a distinct failure mode, but possibly the same underlying kernel issue.