Arm64 jitstress outerloop

[dhartglassMSFT]

Original fix here missed some cases, as msbuild or helix cuts off the failure list after 300:

95f94b6

This is applying the same fix to other locations we needed this.

I grabbed this codechange from @ylpoonlg (thanks in advance)

Ran jitstress, arm64 is green

[dhartglassMSFT]

/azp run runtime-coreclr jitstress2-jitstressregs

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[Copilot]

Pull request overview

This PR adjusts ARM64 JIT HWIntrinsic codegen to correctly account for multi-instruction expansion in RMW-style SVE intrinsics when generating non-constant-immediate jump tables. This aligns the HWIntrinsicImmOpHelper case-size calculation with the emitter’s behavior under register-stress scenarios (e.g., targetReg != op1Reg).

Changes:

• Pass an explicit numInstrs to HWIntrinsicImmOpHelper for SVE saturating inc/dec-by-element-count codegen when the emitter may insert an extra move.
• Pass an explicit numInstrs to HWIntrinsicImmOpHelper for NI_Sve_ExtractVector to match the emitter’s RMW handling (may require a move when targetReg != op1Reg).

[dhartglassMSFT]

Arm64 jitstress is clean on all arm64 including windows+linux (the ones that test SVE2)

android is crit: Failed to find compatible device: arm64-v8a, unrelated
x86 jitstressregs is existing failure, unrelated
NameResolution tests have open issue, unrelated