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Implement SVE2 ShiftLogicalRounded, ShiftLogicalRoundedSaturate #116784

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Merged
kunalspathak merged 3 commits into from
Jun 19, 2025
Merged

Implement SVE2 ShiftLogicalRounded, ShiftLogicalRoundedSaturate #116784

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45d4a94
Implement SVE2 ShiftLogicalRounded, ShiftLogicalSaturateRounded
snickolls-arm Jun 2, 2025
3ecff36
Add HW_Flag_LowMaskedOperation
snickolls-arm Jun 18, 2025
2729214
Merge branch 'main' into sve2-shiftlogicalrounded
kunalspathak Jun 19, 2025
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2 changes: 2 additions & 0 deletions src/coreclr/jit/hwintrinsiclistarm64sve.h
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Expand Up @@ -332,6 +332,8 @@ HARDWARE_INTRINSIC(Sve2, ShiftLeftLogicalSaturate,
HARDWARE_INTRINSIC(Sve2, ShiftLeftLogicalSaturateUnsigned, -1, -1, {INS_invalid, INS_sve_sqshlu, INS_invalid, INS_sve_sqshlu, INS_invalid, INS_sve_sqshlu, INS_invalid, INS_sve_sqshlu, INS_invalid, INS_invalid}, HW_Category_ShiftLeftByImmediate, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_HasImmediateOperand|HW_Flag_HasRMWSemantics)
HARDWARE_INTRINSIC(Sve2, ShiftLeftLogicalWideningEven, -1, 2, {INS_invalid, INS_invalid, INS_sve_sshllb, INS_sve_ushllb, INS_sve_sshllb, INS_sve_ushllb, INS_sve_sshllb, INS_sve_ushllb, INS_invalid, INS_invalid}, HW_Category_ShiftLeftByImmediate, HW_Flag_Scalable|HW_Flag_HasImmediateOperand)
HARDWARE_INTRINSIC(Sve2, ShiftLeftLogicalWideningOdd, -1, 2, {INS_invalid, INS_invalid, INS_sve_sshllt, INS_sve_ushllt, INS_sve_sshllt, INS_sve_ushllt, INS_sve_sshllt, INS_sve_ushllt, INS_invalid, INS_invalid}, HW_Category_ShiftLeftByImmediate, HW_Flag_Scalable|HW_Flag_HasImmediateOperand)
HARDWARE_INTRINSIC(Sve2, ShiftLogicalRounded, -1, -1, {INS_invalid, INS_sve_urshl, INS_invalid, INS_sve_urshl, INS_invalid, INS_sve_urshl, INS_invalid, INS_sve_urshl, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation|HW_Flag_HasRMWSemantics)
HARDWARE_INTRINSIC(Sve2, ShiftLogicalRoundedSaturate, -1, -1, {INS_invalid, INS_sve_uqrshl, INS_invalid, INS_sve_uqrshl, INS_invalid, INS_sve_uqrshl, INS_invalid, INS_sve_uqrshl, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation|HW_Flag_HasRMWSemantics)
HARDWARE_INTRINSIC(Sve2, Xor, -1, 3, {INS_sve_eor3, INS_sve_eor3, INS_sve_eor3, INS_sve_eor3, INS_sve_eor3, INS_sve_eor3, INS_sve_eor3, INS_sve_eor3, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
HARDWARE_INTRINSIC(Sve2, XorRotateRight, -1, 3, {INS_sve_xar, INS_sve_xar, INS_sve_xar, INS_sve_xar, INS_sve_xar, INS_sve_xar, INS_sve_xar, INS_sve_xar, INS_invalid, INS_invalid}, HW_Category_ShiftRightByImmediate, HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_HasImmediateOperand)
#define LAST_NI_Sve2 NI_Sve2_XorRotateRight
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54 changes: 54 additions & 0 deletions ...ies/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.PlatformNotSupported.cs
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Expand Up @@ -796,6 +796,60 @@ internal Arm64() { }
public static Vector<ulong> ShiftLeftLogicalWideningOdd(Vector<uint> value, [ConstantExpected] byte count) { throw new PlatformNotSupportedException(); }


// Rounding shift left

/// <summary>
/// svuint8_t svrshl[_u8]_m(svbool_t pg, svuint8_t op1, svint8_t op2)
/// URSHL Ztied1.B, Pg/M, Ztied1.B, Zop2.B
/// </summary>
public static Vector<byte> ShiftLogicalRounded(Vector<byte> value, Vector<sbyte> count) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svuint16_t svrshl[_u16]_m(svbool_t pg, svuint16_t op1, svint16_t op2)
/// URSHL Ztied1.H, Pg/M, Ztied1.H, Zop2.H
/// </summary>
public static Vector<ushort> ShiftLogicalRounded(Vector<ushort> value, Vector<short> count) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svuint32_t svrshl[_u32]_m(svbool_t pg, svuint32_t op1, svint32_t op2)
/// URSHL Ztied1.S, Pg/M, Ztied1.S, Zop2.S
/// </summary>
public static Vector<uint> ShiftLogicalRounded(Vector<uint> value, Vector<int> count) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svuint64_t svrshl[_u64]_m(svbool_t pg, svuint64_t op1, svint64_t op2)
/// URSHL Ztied1.D, Pg/M, Ztied1.D, Zop2.D
/// </summary>
public static Vector<ulong> ShiftLogicalRounded(Vector<ulong> value, Vector<long> count) { throw new PlatformNotSupportedException(); }


// Saturating rounding shift left

/// <summary>
/// svuint8_t svqrshl[_u8]_m(svbool_t pg, svuint8_t op1, svint8_t op2)
/// UQRSHL Ztied1.B, Pg/M, Ztied1.B, Zop2.B
/// </summary>
public static Vector<byte> ShiftLogicalRoundedSaturate(Vector<byte> value, Vector<sbyte> count) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svuint16_t svqrshl[_u16]_m(svbool_t pg, svuint16_t op1, svint16_t op2)
/// UQRSHL Ztied1.H, Pg/M, Ztied1.H, Zop2.H
/// </summary>
public static Vector<ushort> ShiftLogicalRoundedSaturate(Vector<ushort> value, Vector<short> count) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svuint32_t svqrshl[_u32]_m(svbool_t pg, svuint32_t op1, svint32_t op2)
/// UQRSHL Ztied1.S, Pg/M, Ztied1.S, Zop2.S
/// </summary>
public static Vector<uint> ShiftLogicalRoundedSaturate(Vector<uint> value, Vector<int> count) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svuint64_t svqrshl[_u64]_m(svbool_t pg, svuint64_t op1, svint64_t op2)
/// UQRSHL Ztied1.D, Pg/M, Ztied1.D, Zop2.D
/// </summary>
public static Vector<ulong> ShiftLogicalRoundedSaturate(Vector<ulong> value, Vector<long> count) { throw new PlatformNotSupportedException(); }


// Bitwise exclusive OR of three vectors

/// <summary>
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54 changes: 54 additions & 0 deletions src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.cs
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Expand Up @@ -796,6 +796,60 @@ internal Arm64() { }
public static Vector<ulong> ShiftLeftLogicalWideningOdd(Vector<uint> value, [ConstantExpected] byte count) => ShiftLeftLogicalWideningOdd(value, count);


// Rounding shift left

/// <summary>
/// svuint8_t svrshl[_u8]_m(svbool_t pg, svuint8_t op1, svint8_t op2)
/// URSHL Ztied1.B, Pg/M, Ztied1.B, Zop2.B
/// </summary>
public static Vector<byte> ShiftLogicalRounded(Vector<byte> value, Vector<sbyte> count) => ShiftLogicalRounded(value, count);

/// <summary>
/// svuint16_t svrshl[_u16]_m(svbool_t pg, svuint16_t op1, svint16_t op2)
/// URSHL Ztied1.H, Pg/M, Ztied1.H, Zop2.H
/// </summary>
public static Vector<ushort> ShiftLogicalRounded(Vector<ushort> value, Vector<short> count) => ShiftLogicalRounded(value, count);

/// <summary>
/// svuint32_t svrshl[_u32]_m(svbool_t pg, svuint32_t op1, svint32_t op2)
/// URSHL Ztied1.S, Pg/M, Ztied1.S, Zop2.S
/// </summary>
public static Vector<uint> ShiftLogicalRounded(Vector<uint> value, Vector<int> count) => ShiftLogicalRounded(value, count);

/// <summary>
/// svuint64_t svrshl[_u64]_m(svbool_t pg, svuint64_t op1, svint64_t op2)
/// URSHL Ztied1.D, Pg/M, Ztied1.D, Zop2.D
/// </summary>
public static Vector<ulong> ShiftLogicalRounded(Vector<ulong> value, Vector<long> count) => ShiftLogicalRounded(value, count);


// Saturating rounding shift left

/// <summary>
/// svuint8_t svqrshl[_u8]_m(svbool_t pg, svuint8_t op1, svint8_t op2)
/// UQRSHL Ztied1.B, Pg/M, Ztied1.B, Zop2.B
/// </summary>
public static Vector<byte> ShiftLogicalRoundedSaturate(Vector<byte> value, Vector<sbyte> count) => ShiftLogicalRoundedSaturate(value, count);

/// <summary>
/// svuint16_t svqrshl[_u16]_m(svbool_t pg, svuint16_t op1, svint16_t op2)
/// UQRSHL Ztied1.H, Pg/M, Ztied1.H, Zop2.H
/// </summary>
public static Vector<ushort> ShiftLogicalRoundedSaturate(Vector<ushort> value, Vector<short> count) => ShiftLogicalRoundedSaturate(value, count);

/// <summary>
/// svuint32_t svqrshl[_u32]_m(svbool_t pg, svuint32_t op1, svint32_t op2)
/// UQRSHL Ztied1.S, Pg/M, Ztied1.S, Zop2.S
/// </summary>
public static Vector<uint> ShiftLogicalRoundedSaturate(Vector<uint> value, Vector<int> count) => ShiftLogicalRoundedSaturate(value, count);

/// <summary>
/// svuint64_t svqrshl[_u64]_m(svbool_t pg, svuint64_t op1, svint64_t op2)
/// UQRSHL Ztied1.D, Pg/M, Ztied1.D, Zop2.D
/// </summary>
public static Vector<ulong> ShiftLogicalRoundedSaturate(Vector<ulong> value, Vector<long> count) => ShiftLogicalRoundedSaturate(value, count);


// Bitwise exclusive OR of three vectors

/// <summary>
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8 changes: 8 additions & 0 deletions src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs
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Expand Up @@ -6204,6 +6204,14 @@ internal Arm64() { }
public static System.Numerics.Vector<ushort> ShiftLeftLogicalWideningOdd(System.Numerics.Vector<byte> value, [ConstantExpected] byte count) { throw null; }
public static System.Numerics.Vector<uint> ShiftLeftLogicalWideningOdd(System.Numerics.Vector<ushort> value, [ConstantExpected] byte count) { throw null; }
public static System.Numerics.Vector<ulong> ShiftLeftLogicalWideningOdd(System.Numerics.Vector<uint> value, [ConstantExpected] byte count) { throw null; }
public static System.Numerics.Vector<byte> ShiftLogicalRounded(System.Numerics.Vector<byte> value, System.Numerics.Vector<sbyte> count) { throw null; }
public static System.Numerics.Vector<ushort> ShiftLogicalRounded(System.Numerics.Vector<ushort> value, System.Numerics.Vector<short> count) { throw null; }
public static System.Numerics.Vector<uint> ShiftLogicalRounded(System.Numerics.Vector<uint> value, System.Numerics.Vector<int> count) { throw null; }
public static System.Numerics.Vector<ulong> ShiftLogicalRounded(System.Numerics.Vector<ulong> value, System.Numerics.Vector<long> count) { throw null; }
public static System.Numerics.Vector<byte> ShiftLogicalRoundedSaturate(System.Numerics.Vector<byte> value, System.Numerics.Vector<sbyte> count) { throw null; }
public static System.Numerics.Vector<ushort> ShiftLogicalRoundedSaturate(System.Numerics.Vector<ushort> value, System.Numerics.Vector<short> count) { throw null; }
public static System.Numerics.Vector<uint> ShiftLogicalRoundedSaturate(System.Numerics.Vector<uint> value, System.Numerics.Vector<int> count) { throw null; }
public static System.Numerics.Vector<ulong> ShiftLogicalRoundedSaturate(System.Numerics.Vector<ulong> value, System.Numerics.Vector<long> count) { throw null; }
public static System.Numerics.Vector<byte> Xor(System.Numerics.Vector<byte> value1, System.Numerics.Vector<byte> value2, System.Numerics.Vector<byte> value3) { throw null; }
public static System.Numerics.Vector<short> Xor(System.Numerics.Vector<short> value1, System.Numerics.Vector<short> value2, System.Numerics.Vector<short> value3) { throw null; }
public static System.Numerics.Vector<int> Xor(System.Numerics.Vector<int> value1, System.Numerics.Vector<int> value2, System.Numerics.Vector<int> value3) { throw null; }
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