AMD EPYC 7F72 incorrect temp value

[zaza7]

OS: Proxmox 9.1.6
Kernel: Linux epyc 6.17.13-2-pve #1 SMP PREEMPT_DYNAMIC PMX 6.17.13-2 (2026-03-13T08:06Z) x86_64 GNU/Linux
CPU: AMD EPYC 7F72 24-Core

Cores 0-15 and SMT sibling show correct values whether the system is idle or during atomic burn
Cores 16-23 and SMT sibling, show erroneous temp values such as 0, 5, 147, 197, whether idle or atomic burn

Freshly git cloned CoreFreq, version 2.1.0, as reported in the about menu

k10temp module is blacklisted, modprobe k10temp ran prior to using sensors which shows correct values

k10temp-pci-00c3
Adapter: PCI adapter
Tctl:         +38.2°C  
Tccd1:        +35.0°C  
Tccd2:        +34.0°C  
Tccd3:        +36.5°C  
Tccd5:        +35.0°C  
Tccd7:        +36.2°C  
Tccd8:        +35.0°C

[cyring]

Hello,
It is linked to the regression issue #573 which was not fixed for your EPYC in commit 6bb2712
I'm preparing a quick hot fix ...

[cyring]

@zaza7

Can you print the CPU and Topology information

corefreq-cli -s -n -m

But also the CPUID dump

corefreq-cli -u | head -n 102

[zaza7]

Sure thing I can run those, since the output of those commands is rather long I've used collapsed sections to keep the comment a bit tidier.

corefreq-cli -s -n -m

Processor                                      [AMD EPYC 7F72 24-Core Processor]
|- PPIN#                                                      [ 262185db68cc040]
|- Architecture                                                 [Zen2/EPYC/Rome]
|- Vendor ID                                                      [AuthenticAMD]
|- Firmware                                                        [ 36.119.0-2]
|- Microcode                                                        [0x0830107d]
|- Signature                                                           [  8F_31]
|- Stepping                                                            [      0]
|- Online CPU                                                          [ 48/ 48]
|- Base Clock                                                          [ 99.995]
|- Frequency            (MHz)                      Ratio                        
                 Min   2499.87                    <  25 >                       
                 Max   3199.83                    <  32 >                       
|- Factory                                                             [100.000]
                       3200                       [  32 ]                       
|- Performance                                                                  
                 TGT   2999.88                    <  30 >                       
   |- CPPC                                                                      
                 Min    399.98                    <   4 >                       
                 Max   3699.80                    <  37 >                       
                 TGT   3699.80                    <  37 >                       
   |- Boost                                                            [   LOCK]
                 XFR   3699.80                    [  37 ]                       
                 CPB   3699.80                    [  37 ]                       
   |- P-State                                                                   
                 P1    2999.84                    <  30 >                       
                 P2    2499.87                    <  25 >                       
|- Uncore                                                              [   LOCK]
                 CLK   1599.91                    [  16 ]                       
                 MEM   4799.74                    [  48 ]                       
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [N]    AVX512-DQ [N]  AVX512-IFMA [N]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [N]    AVX512-BW [N]   AVX512-VL [N] 
|- AVX512-VBMI  [N] AVX512-VBMI2 [N]  AVX512-VNNI [N]  AVX512-ALG [N] 
|- AVX512-VPOP  [N] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [N] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y] 
|- VAES         [N]   VPCLMULQDQ [N]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- LOCK prefix to read CR8                                    AltMov   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP CMPSB|SCASB                                   FSRC   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Missing]
|- Fast Short REP STOSB                                         FSRS   [Missing]
|- Fast-String Operation                                        ERMS   [Missing]
|- Fused Multiply Add                                           FMA4   [Missing]
|- Fused Multiply Add                                            FMA   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hyper-Threading Technology                                    HTT   [Capable]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Missing]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Capable]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- OS Visible Work-around                                       OSVW   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- PREFETCHIT0/1 Instructions                              PREFETCHI   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Trailing Bit Manipulation                                     TBM   [Missing]
|- Translation Cache Extension                                   TCE   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Missing]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
|- Extended Operation Support                                    XOP   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Selective Branch Predictor Barrier                           SBPB   [ Unable]
|- Single Thread Indirect Branch Predictor                     STIBP   [Capable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Speculative Return Stack Overflow                      SRSO_NO   [ Unable]
   |- No SRSO at the User-Kernel boundary                              [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [ Unable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [ Enable]
|- Limited Early Redirect Window                            AGENPICK   [Disable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [ Unable]
|- Arch - Enhanced Predictive Store Forwarding                  EPSF   [Missing]
|- Arch - Cross Processor Information Leak                XPROC_LEAK   [Disable]
Security Features                                                               
|- CET Shadow Stack features                                  CET-SS   [Missing]
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Capable]
|- SEV - Encrypted State                                      SEV-ES   [Capable]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Missing]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Memory Encryption                                      SME   [Capable]
|- Transparent SME                                              TSME   [ Enable]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
|- DRAM Data Scrambling                                    Scrambler   [ Enable]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
|- Cache Prefetchers                                                            
   |- L2 Prefetcher                                                L2 HW   < ON>
   |- L1 Stride Prefetcher                                     L1 Stride   <OFF>
   |- L1 Region Prefetcher                                     L1 Region   <OFF>
   |- L1 Burst Prefetch Mode                                    L1 Burst   <OFF>
   |- L2 Stream HW Prefetcher                                  L2 Stream   <OFF>
   |- L2 Up/Down Prefetcher                                   L2 Up/Down   <OFF>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [ ON]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   < ON>
|- Virtualization                                                    SVM   [ ON]
   |- I/O MMU                                                      AMD-V   [ ON]
   |- Version                                                     [         0.1]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  1]
|- Counters:          General                   Fixed                           
|           {  6,  6,  4 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       <OFF>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       <OFF>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x813 ]
|- ACPI Processor C-States                                      _CST   [      2]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
   |- Monitor-Mwait Extensions                                   EMX   [Capable]
   |- Interrupt Break-Event                                      IBE   [Capable]
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- TSC for Performance Profiling                                       [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Processor Performance Control                                _PCT   [ Enable]
|- Performance Supported States                                 _PSS   [      3]
|- Performance Present Capabilities                             _PPC   [      0]
|- Continuous Performance Control                               _CPC   [ Enable]
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [ 49: 12 C]
|- CPPC Energy Preference                                        EPP   <      0>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [  480 W]
   |- Minimum Power                                              Min   [  104 W]
   |- Maximum Power                                              Max   [  402 W]
|- Thermal Design Power                                      Package   < Enable>
   |- Power Limit                                                PL1   <  240 W>
   |- Time Window                                                TW1   <   0 ns>
   |- Power Limit                                                PL2   <  240 W>
   |- Time Window                                                TW2   <   0 ns>
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [    4 W]
|- Electrical Design Current                                     EDC   [  452 A]
|- Thermal Design Current                                        TDC   [  111 A]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  115 C]
   |- HTC Temperature Limit                                    Limit   [  106 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [  0.125000000]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0  0   0  0      32  8        32  8       512  8 i  196608 16w 
001:  0    2   0  0   1  0      32  8        32  8       512  8 i  196608 16w 
002:  0    8   0  1   4  0      32  8        32  8       512  8 i  196608 16w 
003:  0   10   0  1   5  0      32  8        32  8       512  8 i  196608 16w 
004:  0   16   2  2   8  0      32  8        32  8       512  8 i  196608 16w 
005:  0   18   2  2   9  0      32  8        32  8       512  8 i  196608 16w 
006:  0   24   2  3  12  0      32  8        32  8       512  8 i  196608 16w 
007:  0   26   2  3  13  0      32  8        32  8       512  8 i  196608 16w 
008:  0   32   4  4  16  0      32  8        32  8       512  8 i  196608 16w 
009:  0   34   4  4  17  0      32  8        32  8       512  8 i  196608 16w 
010:  0   40   4  5  20  0      32  8        32  8       512  8 i  196608 16w 
011:  0   42   4  5  21  0      32  8        32  8       512  8 i  196608 16w 
012:  0   48   6  6  24  0      32  8        32  8       512  8 i  196608 16w 
013:  0   50   6  6  25  0      32  8        32  8       512  8 i  196608 16w 
014:  0   56   6  7  28  0      32  8        32  8       512  8 i  196608 16w 
015:  0   58   6  7  29  0      32  8        32  8       512  8 i  196608 16w 
016:  0   64   8  8  32  0      32  8        32  8       512  8 i  196608 16w 
017:  0   66   8  8  33  0      32  8        32  8       512  8 i  196608 16w 
018:  0   72   8  9  36  0      32  8        32  8       512  8 i  196608 16w 
019:  0   74   8  9  37  0      32  8        32  8       512  8 i  196608 16w 
020:  0   80  10 10  40  0      32  8        32  8       512  8 i  196608 16w 
021:  0   82  10 10  41  0      32  8        32  8       512  8 i  196608 16w 
022:  0   88  10 11  44  0      32  8        32  8       512  8 i  196608 16w 
023:  0   90  10 11  45  0      32  8        32  8       512  8 i  196608 16w 
024:  0    1   0  0   0  1      32  8        32  8       512  8 i  196608 16w 
025:  0    3   0  0   1  1      32  8        32  8       512  8 i  196608 16w 
026:  0    9   0  1   4  1      32  8        32  8       512  8 i  196608 16w 
027:  0   11   0  1   5  1      32  8        32  8       512  8 i  196608 16w 
028:  0   17   2  2   8  1      32  8        32  8       512  8 i  196608 16w 
029:  0   19   2  2   9  1      32  8        32  8       512  8 i  196608 16w 
030:  0   25   2  3  12  1      32  8        32  8       512  8 i  196608 16w 
031:  0   27   2  3  13  1      32  8        32  8       512  8 i  196608 16w 
032:  0   33   4  4  16  1      32  8        32  8       512  8 i  196608 16w 
033:  0   35   4  4  17  1      32  8        32  8       512  8 i  196608 16w 
034:  0   41   4  5  20  1      32  8        32  8       512  8 i  196608 16w 
035:  0   43   4  5  21  1      32  8        32  8       512  8 i  196608 16w 
036:  0   49   6  6  24  1      32  8        32  8       512  8 i  196608 16w 
037:  0   51   6  6  25  1      32  8        32  8       512  8 i  196608 16w 
038:  0   57   6  7  28  1      32  8        32  8       512  8 i  196608 16w 
039:  0   59   6  7  29  1      32  8        32  8       512  8 i  196608 16w 
040:  0   65   8  8  32  1      32  8        32  8       512  8 i  196608 16w 
041:  0   67   8  8  33  1      32  8        32  8       512  8 i  196608 16w 
042:  0   73   8  9  36  1      32  8        32  8       512  8 i  196608 16w 
043:  0   75   8  9  37  1      32  8        32  8       512  8 i  196608 16w 
044:  0   81  10 10  40  1      32  8        32  8       512  8 i  196608 16w 
045:  0   83  10 10  41  1      32  8        32  8       512  8 i  196608 16w 
046:  0   89  10 11  44  1      32  8        32  8       512  8 i  196608 16w 
047:  0   91  10 11  45  1      32  8        32  8       512  8 i  196608 16w

corefreq-cli -u | head -n 102

CPU #0   function         EAX          EBX          ECX          EDX            
|- 00000000:00000000    00000010     68747541     444d4163     69746e65         
   |- Largest Standard Function=00000010                                        
|- 80000000:00000000    80000020     68747541     444d4163     69746e65         
   |- Largest Extended Function=80000020                                        
|- 00000001:00000000    00830f10     00300800     7ed8320b     178bfbff         
|- 00000002:00000000    00000000     00000000     00000000     00000000         
|- 00000003:00000000    00000000     00000000     00000000     00000000         
|- 00000004:00000000    00000000     00000000     00000000     00000000         
|- 00000004:00000001    00000000     00000000     00000000     00000000         
|- 00000004:00000002    00000000     00000000     00000000     00000000         
|- 00000004:00000003    00000000     00000000     00000000     00000000         
|- 00000005:00000000    00000040     00000040     00000003     00000011         
|- 00000006:00000000    00000004     00000000     00000001     00000000         
|- 00000007:00000000    00000000     219c91a9     00400004     00000000         
|- 00000007:00000001    00000000     00000000     00000000     00000000         
|- 00000007:00000002    00000000     00000000     00000000     00000000         
|- 00000009:00000000    00000000     00000000     00000000     00000000         
|- 0000000a:00000000    00000000     00000000     00000000     00000000         
|- 0000000b:00000000    00000001     00000002     00000100     00000000         
|- 0000000d:00000000    00000207     00000340     00000380     00000000         
|- 0000000d:00000001    0000000f     00000340     00000000     00000000         
|- 0000000d:00000002    00000100     00000240     00000000     00000000         
|- 0000000d:00000003    00000000     00000000     00000000     00000000         
|- 0000000d:00000004    00000000     00000000     00000000     00000000         
|- 0000000d:00000009    00000040     00000340     00000000     00000000         
|- 0000000d:0000000b    00000000     00000000     00000000     00000000         
|- 0000000d:0000000c    00000000     00000000     00000000     00000000         
|- 0000000d:0000003e    00000000     00000000     00000000     00000000         
|- 0000000f:00000000    00000000     000000ff     00000000     00000002         
|- 0000000f:00000001    00000000     00000040     000000ff     00000007         
|- 00000010:00000000    00000000     00000002     00000000     00000000         
|- 00000010:00000001    0000000f     00000000     00000004     0000000f         
|- 00000010:00000002    00000000     00000000     00000000     00000000         
|- 00000010:00000003    00000000     00000000     00000000     00000000         
|- 00000012:00000000    00000000     00000000     00000000     00000000         
|- 00000012:00000001    00000000     00000000     00000000     00000000         
|- 00000012:00000002    00000000     00000000     00000000     00000000         
|- 00000014:00000000    00000000     00000000     00000000     00000000         
|- 00000014:00000001    00000000     00000000     00000000     00000000         
|- 00000015:00000000    00000000     00000000     00000000     00000000         
|- 00000016:00000000    00000000     00000000     00000000     00000000         
|- 00000017:00000000    00000000     00000000     00000000     00000000         
|- 00000017:00000001    00000000     00000000     00000000     00000000         
|- 00000017:00000002    00000000     00000000     00000000     00000000         
|- 00000017:00000003    00000000     00000000     00000000     00000000         
|- 00000018:00000000    00000000     00000000     00000000     00000000         
|- 00000018:00000001    00000000     00000000     00000000     00000000         
|- 00000018:00000002    00000000     00000000     00000000     00000000         
|- 00000018:00000003    00000000     00000000     00000000     00000000         
|- 00000018:00000004    00000000     00000000     00000000     00000000         
|- 00000019:00000000    00000000     00000000     00000000     00000000         
|- 0000001a:00000000    00000000     00000000     00000000     00000000         
|- 0000001b:00000000    00000000     00000000     00000000     00000000         
|- 0000001c:00000000    00000000     00000000     00000000     00000000         
|- 0000001d:00000000    00000000     00000000     00000000     00000000         
|- 0000001d:00000001    00000000     00000000     00000000     00000000         
|- 0000001e:00000000    00000000     00000000     00000000     00000000         
|- 0000001f:00000000    00000000     00000000     00000000     00000000         
|- 00000020:00000000    00000000     00000000     00000000     00000000         
|- 00000023:00000000    00000000     00000000     00000000     00000000         
|- 00000023:00000001    00000000     00000000     00000000     00000000         
|- 00000023:00000002    00000000     00000000     00000000     00000000         
|- 00000023:00000003    00000000     00000000     00000000     00000000         
|- 80000001:00000000    00830f10     40000000     75c237ff     2fd3fbff         
|- 80000002:00000000    20444d41     43595045     37463720     34322032         
|- 80000003:00000000    726f432d     72502065     7365636f     20726f73         
|- 80000004:00000000    20202020     20202020     20202020     00202020         
|- 80000005:00000000    ff40ff40     ff40ff40     20080140     20080140         
|- 80000006:00000000    48006400     68006400     02006140     06009140         
|- 80000007:00000000    00000000     0000001b     00000000     00006799         
|- 80000008:00000000    00003030     018cf757     0000702f     00010000         
|- 8000000a:00000000    00000001     00008000     00000000     0013bcff         
|- 80000019:00000000    f040f040     00000000     00000000     00000000         
|- 8000001a:00000000    00000006     00000000     00000000     00000000         
|- 8000001b:00000000    000003ff     00000000     00000000     00000000         
|- 8000001c:00000000    00000000     00000000     00000000     00000000         
|- 8000001d:00000000    00004121     01c0003f     0000003f     00000000         
|- 8000001d:00000001    00004122     01c0003f     0000003f     00000000         
|- 8000001d:00000002    00004143     01c0003f     000003ff     00000002         
|- 8000001d:00000003    0000c163     03c0003f     00003fff     00000001         
|- 8000001d:00000004    00000000     00000000     00000000     00000000         
|- 8000001e:00000000    00000000     00000100     00000000     00000000         
|- 8000001f:00000000    0001000f     0000016f     000001fd     00000001         
|- 80000020:00000000    00000000     00000002     00000000     00000000         
|- 80000020:00000001    0000000b     00000000     00000000     0000000f         
|- 80000020:00000002    00000000     00000000     00000000     00000000         
|- 80000020:00000003    00000000     00000000     00000000     00000000         
|- 80000021:00000000    00000000     00000000     00000000     00000000         
|- 80000022:00000000    00000000     00000000     00000000     00000000         
|- 80000023:00000000    00000000     00000000     00000000     00000000         
|- 80000026:00000000    00000000     00000000     00000000     00000000         
|- 80000026:00000001    00000000     00000000     00000000     00000000         
|- 80000026:00000002    00000000     00000000     00000000     00000000         
|- 80000026:00000003    00000000     00000000     00000000     00000000         
|- 40000000:00000000    00000000     00000000     00000000     00000000         
|- 40000001:00000000    00000000     00000000     00000000     00000000         
|- 40000002:00000000    00000000     00000000     00000000     00000000         
|- 40000003:00000000    00000000     00000000     00000000     00000000         
|- 40000004:00000000    00000000     00000000     00000000     00000000         
|- 40000005:00000000    00000000     00000000     00000000     00000000         
|- 40000006:00000000    00000000     00000000     00000000     00000000

[cyring]

Thank you. I'm verifying if topology is the issue

Meanwhile can you git checkout the tag 1.98.5; rebuild/reload CoreFreq and check if temperatures are correct. If OK please post the topology.

[zaza7]

After checking out 1.98.5 and attempting to make I am unfortunately met with an error... It seems the proxmox 6.14 and proxmox 6.17 kernels no longer ship this

  CC [build/corefreqd.o]
  CC [build/corefreqm.o]
  LD [build/corefreqd]
  CC [build/corefreq-cli.o]
  CC [build/corefreq-ui.o]
  CC [build/corefreq-cli-rsc.o]
  CC [build/corefreq-cli-json.o]
  CC [build/corefreq-cli-extra.o]
  LD [build/corefreq-cli]
  CC [M]  module/corefreqk.o
module/corefreqk.c:52:10: fatal error: asm/amd_nb.h: No such file or directory
   52 | #include <asm/amd_nb.h>
      |          ^~~~~~~~~~~~~~
compilation terminated.
make[3]: *** [/usr/src/linux-headers-6.17.13-2-pve/scripts/Makefile.build:287: module/corefreqk.o] Error 1
make[2]: *** [/usr/src/linux-headers-6.17.13-2-pve/Makefile:2016: .] Error 2
make[1]: *** [Makefile:248: __sub-make] Error 2
make: *** [Makefile:129: all] Error 2

One exception seems to be kernel 6.14.4-1+deb13u1-pve which does include this but fails to make for a different error

  CC [build/corefreqd.o]
  CC [build/corefreqm.o]
  LD [build/corefreqd]
  CC [build/corefreq-cli.o]
  CC [build/corefreq-ui.o]
  CC [build/corefreq-cli-rsc.o]
  CC [build/corefreq-cli-json.o]
  CC [build/corefreq-cli-extra.o]
  LD [build/corefreq-cli]
  CC [M]  module/corefreqk.o
In file included from module/corefreqk.c:67:
module/corefreqk.c: In function ‘AMD_Zen_UMC’:
/root/CoreFreq/x86_64/corefreqk.h:738:33: error: implicit declaration of function ‘amd_pci_dev_to_node_id’ [-Wimplicit-function-declaration]
  738 |                 if (AMD_SMN_RW( amd_pci_dev_to_node_id(UMC_device),     \
      |                                 ^~~~~~~~~~~~~~~~~~~~~~
/root/CoreFreq/x86_64/corefreqk.h:707:7: note: in definition of macro ‘AMD_SMN_RW’
  707 |   if (node < amd_nb_num())                                              \
      |       ^~~~
/root/CoreFreq/x86_64/corefreqk.h:787:17: note: in expansion of macro ‘AMD_SMN_Read’
  787 |                 AMD_SMN_Read(SMN_Register, SMN_Address, UMC_device);    \
      |                 ^~~~~~~~~~~~
module/corefreqk.c:6954:9: note: in expansion of macro ‘Core_AMD_SMN_Read’
 6954 |         Core_AMD_SMN_Read(
      |         ^~~~~~~~~~~~~~~~~
compilation terminated due to -Wfatal-errors.
make[3]: *** [/usr/src/linux-headers-6.14.4-1+deb13u1-pve/scripts/Makefile.build:207: module/corefreqk.o] Error 1
make[2]: *** [/usr/src/linux-headers-6.14.4-1+deb13u1-pve/Makefile:2001: .] Error 2
make[1]: *** [Makefile:251: __sub-make] Error 2
make: *** [Makefile:129: all] Error 2

Using the archlinux iso from 1.98.5 nearly all cores report sensible values except for 20-23 and their SMT sibling 44-47, these report 0/0/0, apologies I couldn't figure out how to get a text output of this, topology as shown while booted from the archlinux iso.
At first glance however cores 16-19 show CCD 4, which is the same as cores 8-11, so perhaps it's reading the same values for those sets? I'm inclined to believe so as the values fluctuate in unison

[cyring]

The thermal junction (TjMax) of the 7002 Series is missing and it has not been decoded from HSMP protocol

CoreFreq/x86_64/corefreqk.h

Line 6399 in 59efe7e

.Param.Offset = {0, 0, 0},

For instance, presuming it is 95 (like other EPYC generations in the list) then we just need to specify it within the block source code at first parameter of .Param.Offset :

	{
	.Brand = ZLIST( "AMD EPYC Embedded 7542",	\
			"AMD EPYC Embedded 7F72",	\
			"AMD EPYC 7542",		\
			"AMD EPYC 7F72" 		),
	.Boost = {+5, 0},
	.Param.Offset = {95, 0, 0},
	.CodeNameIdx = CN_ROME,
	.TgtRatioUnlocked = 1,
	.ClkRatioUnlocked = 0b10,
	.TurboUnlocked = 0,
	.UncoreUnlocked = 0,
	.HSMP_Capable = 1,
	.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK\
		|LATCH_HSMP_CAPABLE
	},

Based on master branch, once edited/rebuild/reload you should read from corefreq-cli -s

Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [ 49: 95 C]

And perhaps good temperatures ?

---

FYI, TjMax can be any other value than 95 but I'm still not finding a thermal specification within documentations 1 2

[zaza7]

If I've understood correctly, I should edit the file /CoreFreq/x86_64/corefreqk.h, line 6399
from .Param.Offset = {0, 0, 0}, to .Param.Offset = {95, 0, 0},
Followed by

make
insmod build/corefreqk.ko
./build/corefreqd
In a separate shell
./build/corefreq-cli -s

and Junction should report 95 C instead of 12 C?

If those steps are correct, regrettably the Offset:Junction is still 49: 12C

Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [ 49: 12 C]

[cyring]

If those steps are correct, regrettably the Offset:Junction is still 49: 12C

Can you pull latest commit from master where TjMax is set to 95 for EPYC 7F72 and now fixed to be overridden

[cyring]

There are 8 CCD

General rule is that CCD number is computed from APIC_id [Right_Shift] 4

For example, your highest CPU #47 should be CCD = 91 >> 4 = 5

---

Issue #572 : But in some architectures like Threadripper 3960X (See CPU topology/SMT ON) I had to fixed the CCD afterwards with CCD = CCD << 1

---

7F72 temperatures should be fixed if you edit and put in comment the Left Shift operation as below:

CoreFreq/x86_64/corefreqk.c

Line 2339 in 1621e35

Core->T.Cluster.CCD = Core->T.Cluster.CCD << 1;

		if ( (leaf80000008.ECX.NC == 0x2f)
		  || (leaf80000008.ECX.NC == 0x17) )
		{
/*			Core->T.Cluster.CCD = Core->T.Cluster.CCD << 1; */
		}

• NC is the number of Cores, zero based
• EPYC 7F72 and 3960X, both report 0x2f (decimal 47) thus 48 SMT Cores

Please rebuild/reload and post the CCD temperatures

## Edit x86_64/corefreqk.c as requested above
## Fully clean project before build
make clean
make -j14
rmmod build/corefreqk.ko
insmod build/corefreqk.ko
./build/corefreqd
## In a separate shell
./build/corefreq-cli -c 1 -C 1 -n -s -n -m

[zaza7]

Happy to report after update and rebuild, Offset:Junction is TjMax [ 49: 95 C]

Prior to commenting the bitshift op the topology, temp, are reported as follows:

./build/corefreq-cli -c 1 -C 1 -n -s -n -m

CPU Freq(MHz) Ratio  Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)  Min TMP:TS  Max
000   44.44 ( 0.44)   1.39   2.37  97.63   0.00   0.00   0.00  34 / 34:670/ 35
001    7.52 ( 0.08)   0.23   0.40  99.60   0.00   0.00   0.00  34 / 35:672/ 35
002   31.10 ( 0.31)   0.97   1.52  98.48   0.00   0.00   0.00  34 / 35:672/ 35
003   30.49 ( 0.30)   0.95   1.65  98.35   0.00   0.00   0.00  34 / 35:672/ 35
004    4.36 ( 0.04)   0.14   0.23  99.77   0.00   0.00   0.00  36 / 36:680/ 36
005    1.44 ( 0.01)   0.05   0.08  99.92   0.00   0.00   0.00  36 / 36:680/ 36
006   26.13 ( 0.26)   0.82   1.29  98.71   0.00   0.00   0.00  36 / 36:680/ 36
007   40.74 ( 0.41)   1.27   1.95  98.05   0.00   0.00   0.00  36 / 36:680/ 36
008   23.27 ( 0.23)   0.73   1.03  98.97   0.00   0.00   0.00  34 / 35:672/ 35
009   17.16 ( 0.17)   0.54   0.73  99.27   0.00   0.00   0.00  34 / 35:672/ 35
010   89.93 ( 0.90)   2.81   3.80  96.20   0.00   0.00   0.00  34 / 35:672/ 35
011   41.10 ( 0.41)   1.28   1.92  98.08   0.00   0.00   0.00  35 / 35:672/ 35
012    1.47 ( 0.01)   0.05   0.08  99.92   0.00   0.00   0.00  35 / 35:678/ 35
013    7.91 ( 0.08)   0.25   0.38  99.62   0.00   0.00   0.00  35 / 35:678/ 35
014    2.91 ( 0.03)   0.09   0.16  99.84   0.00   0.00   0.00  35 / 35:678/ 35
015    1.63 ( 0.02)   0.05   0.09  99.91   0.00   0.00   0.00  35 / 35:678/ 35
016    3.62 ( 0.04)   0.11   0.18  99.82   0.00   0.00   0.00  0  /  0:0  /  0
017    2.08 ( 0.02)   0.06   0.11  99.89   0.00   0.00   0.00  0  /  0:0  /  0
018   20.49 ( 0.20)   0.64   1.02  98.98   0.00   0.00   0.00  0  /  0:0  /  0
019    1.63 ( 0.02)   0.05   0.09  99.91   0.00   0.00   0.00  0  /  0:0  /  0
020    0.77 ( 0.01)   0.02   0.04  99.96   0.00   0.00   0.00  4  /  4:36 /196
021    0.85 ( 0.01)   0.03   0.05  99.95   0.00   0.00   0.00  4  /  4:36 /196
022    3.16 ( 0.03)   0.10   0.18  99.82   0.00   0.00   0.00  4  /  4:36 /196
023    6.81 ( 0.07)   0.21   0.37  99.63   0.00   0.00   0.00  4  /  4:36 /196
024    0.93 ( 0.01)   0.03   0.05  99.95   0.00   0.00   0.00  34 / 35:672/ 35
025    0.52 ( 0.01)   0.02   0.03  99.97   0.00   0.00   0.00  34 / 35:672/ 35
026   15.92 ( 0.16)   0.50   0.82  99.18   0.00   0.00   0.00  34 / 35:672/ 35
027    1.14 ( 0.01)   0.04   0.06  99.94   0.00   0.00   0.00  34 / 35:672/ 35
028    3.31 ( 0.03)   0.10   0.18  99.82   0.00   0.00   0.00  35 / 36:680/ 36
029    1.88 ( 0.02)   0.06   0.10  99.90   0.00   0.00   0.00  35 / 36:680/ 36
030   10.73 ( 0.11)   0.34   0.51  99.49   0.00   0.00   0.00  35 / 36:680/ 36
031   44.80 ( 0.45)   1.40   2.21  97.79   0.00   0.00   0.00  35 / 36:680/ 36
032    7.69 ( 0.08)   0.24   0.38  99.62   0.00   0.00   0.00  34 / 35:672/ 35
033   11.58 ( 0.12)   0.36   0.59  99.41   0.00   0.00   0.00  34 / 35:672/ 35
034    8.17 ( 0.08)   0.26   0.36  99.64   0.00   0.00   0.00  34 / 35:672/ 35
035   35.29 ( 0.35)   1.10   1.54  98.46   0.00   0.00   0.00  34 / 35:672/ 35
036    1.23 ( 0.01)   0.04   0.07  99.93   0.00   0.00   0.00  35 / 35:678/ 35
037    0.64 ( 0.01)   0.02   0.03  99.97   0.00   0.00   0.00  35 / 35:678/ 35
038    1.53 ( 0.02)   0.05   0.08  99.92   0.00   0.00   0.00  35 / 35:678/ 35
039    1.20 ( 0.01)   0.04   0.07  99.93   0.00   0.00   0.00  35 / 35:678/ 35
040    1.34 ( 0.01)   0.04   0.07  99.93   0.00   0.00   0.00  0  /  0:0  /  0
041    4.27 ( 0.04)   0.13   0.21  99.79   0.00   0.00   0.00  0  /  0:0  /  0
042    1.16 ( 0.01)   0.04   0.06  99.94   0.00   0.00   0.00  0  /  0:0  /  0
043    2.46 ( 0.02)   0.08   0.12  99.88   0.00   0.00   0.00  0  /  0:0  /  0
044    1.16 ( 0.01)   0.04   0.06  99.94   0.00   0.00   0.00  4  /  4:36 /196
045    0.87 ( 0.01)   0.03   0.04  99.96   0.00   0.00   0.00  4  /  4:36 /196
046    1.25 ( 0.01)   0.04   0.07  99.93   0.00   0.00   0.00  4  /  4:36 /196
047    1.14 ( 0.01)   0.04   0.06  99.94   0.00   0.00   0.00  4  /  4:36 /196

    Averages:        Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)    TjMax:    Pkg:
                      0.37   0.57  99.43   0.00   0.00   0.00      95 C    36 C

CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000   41.15   121  0.7937   35  000000000000001731    0.026412964   0.026412964
001   10.30   121  0.7937   35  000000000000000534    0.008148193   0.008148193
002   19.90   121  0.7937   35  000000000000002365    0.036087036   0.036087036
003   17.75   121  0.7937   35  000000000000000928    0.014160156   0.014160156
004    6.80   122  0.7875   36  000000000000000579    0.008834839   0.008834839
005   24.76   121  0.7937   36  000000000000002381    0.036331177   0.036331177
006   21.73   122  0.7875   36  000000000000002122    0.032379150   0.032379150
007   21.29   122  0.7875   36  000000000000002681    0.040908813   0.040908813
008    9.02   123  0.7812   35  000000000000000970    0.014801025   0.014801025
009    4.88   122  0.7875   35  000000000000000845    0.012893677   0.012893677
010   49.50   122  0.7875   35  000000000000009638    0.147064209   0.147064209
011   56.76   121  0.7937   35  000000000000007429    0.113357544   0.113357544
012   20.16   120  0.8000   35  000000000000000817    0.012466431   0.012466431
013    5.24   121  0.7937   35  000000000000000264    0.004028320   0.004028320
014    2.71   120  0.8000   35  000000000000000906    0.013824463   0.013824463
015    3.31   121  0.7937   35  000000000000001258    0.019195557   0.019195557
016    5.90   121  0.7937    0  000000000000001596    0.024353027   0.024353027
017    3.48   121  0.7937    0  000000000000000776    0.011840820   0.011840820
018    8.12   121  0.7937    0  000000000000001566    0.023895264   0.023895264
019    2.87   121  0.7937    0  000000000000010542    0.160858154   0.160858154
020    2.67   121  0.7937  196  000000000000005438    0.082977295   0.082977295
021    1.48   121  0.7937  196  000000000000002946    0.044952393   0.044952393
022    4.03   121  0.7937  196  000000000000001405    0.021438599   0.021438599
023    7.21   122  0.7875  196  000000000000001296    0.019775391   0.019775391
024    1.59   121  0.7937   35  000000000000000000    0.000000000   0.000000000
025    2.80   121  0.7937   35  000000000000000000    0.000000000   0.000000000
026   17.67   121  0.7937   35  000000000000000000    0.000000000   0.000000000
027    1.40   121  0.7937   35  000000000000000000    0.000000000   0.000000000
028    5.99   122  0.7875   36  000000000000000000    0.000000000   0.000000000
029    5.00   121  0.7937   36  000000000000000000    0.000000000   0.000000000
030   13.78   122  0.7875   36  000000000000000000    0.000000000   0.000000000
031   37.38   122  0.7875   36  000000000000000000    0.000000000   0.000000000
032    8.83   123  0.7812   35  000000000000000000    0.000000000   0.000000000
033    8.39   122  0.7875   35  000000000000000000    0.000000000   0.000000000
034   99.07   122  0.7875   35  000000000000000000    0.000000000   0.000000000
035   58.86   121  0.7937   35  000000000000000000    0.000000000   0.000000000
036    5.48   120  0.8000   35  000000000000000000    0.000000000   0.000000000
037    2.07   121  0.7937   35  000000000000000000    0.000000000   0.000000000
038    9.47   120  0.8000   35  000000000000000000    0.000000000   0.000000000
039   14.58    81  1.0438   35  000000000000000000    0.000000000   0.000000000
040   15.70    81  1.0438    0  000000000000000000    0.000000000   0.000000000
041   12.45    52  1.2250    0  000000000000000000    0.000000000   0.000000000
042   11.61    81  1.0438    0  000000000000000000    0.000000000   0.000000000
043   94.32    81  1.0438    0  000000000000000000    0.000000000   0.000000000
044   64.74    81  1.0438  196  000000000000000000    0.000000000   0.000000000
045   31.45    81  1.0438  196  000000000000000000    0.000000000   0.000000000
046   14.64    81  1.0438  196  000000000000000000    0.000000000   0.000000000
047    9.82    82  1.0375  196  000000000000000000    0.000000000   0.000000000

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J):  62.739852905   0.930984497   9.785461426   0.000000000   0.000000000
Power(W) :  62.739852905   0.930984497   9.785461426   0.000000000   0.000000000


Processor                                      [AMD EPYC 7F72 24-Core Processor]
|- PPIN#                                                      [ 262185db68cc040]
|- Architecture                                                 [Zen2/EPYC/Rome]
|- Vendor ID                                                      [AuthenticAMD]
|- Firmware                                                        [ 36.119.0-2]
|- Microcode                                                        [0x0830107d]
|- Signature                                                           [  8F_31]
|- Stepping                                                            [      0]
|- Online CPU                                                          [ 48/ 48]
|- Base Clock                                                          [ 99.995]
|- Frequency            (MHz)                      Ratio                        
                 Min   2499.88                    <  25 >                       
                 Max   3199.85                    <  32 >                       
|- Factory                                                             [100.000]
                       3200                       [  32 ]                       
|- Performance                                                                  
                 TGT   3199.85                    <  32 >                       
   |- CPPC                                                                      
                 Min    399.98                    <   4 >                       
                 Max   3699.83                    <  37 >                       
                 TGT   3699.83                    <  37 >                       
   |- Boost                                                            [   LOCK]
                 XFR   3699.83                    [  37 ]                       
                 CPB   3699.83                    [  37 ]                       
   |- P-State                                                                   
                 P1    2999.86                    <  30 >                       
                 P2    2499.88                    <  25 >                       
|- Uncore                                                              [   LOCK]
                 CLK   1599.93                    [  16 ]                       
                 MEM   4799.78                    [  48 ]                       
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [N]    AVX512-DQ [N]  AVX512-IFMA [N]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [N]    AVX512-BW [N]   AVX512-VL [N] 
|- AVX512-VBMI  [N] AVX512-VBMI2 [N]  AVX512-VNNI [N]  AVX512-ALG [N] 
|- AVX512-VPOP  [N] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [N] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y] 
|- VAES         [N]   VPCLMULQDQ [N]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- LOCK prefix to read CR8                                    AltMov   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP CMPSB|SCASB                                   FSRC   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Missing]
|- Fast Short REP STOSB                                         FSRS   [Missing]
|- Fast-String Operation                                        ERMS   [Missing]
|- Fused Multiply Add                                           FMA4   [Missing]
|- Fused Multiply Add                                            FMA   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hyper-Threading Technology                                    HTT   [Capable]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Missing]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Capable]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- OS Visible Work-around                                       OSVW   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- PREFETCHIT0/1 Instructions                              PREFETCHI   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Trailing Bit Manipulation                                     TBM   [Missing]
|- Translation Cache Extension                                   TCE   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Missing]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
|- Extended Operation Support                                    XOP   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Selective Branch Predictor Barrier                           SBPB   [ Unable]
|- Single Thread Indirect Branch Predictor                     STIBP   [Capable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Speculative Return Stack Overflow                      SRSO_NO   [ Unable]
   |- No SRSO at the User-Kernel boundary                              [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [ Unable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [ Enable]
|- Limited Early Redirect Window                            AGENPICK   [Disable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [ Unable]
|- Arch - Enhanced Predictive Store Forwarding                  EPSF   [Missing]
|- Arch - Cross Processor Information Leak                XPROC_LEAK   [Disable]
Security Features                                                               
|- CET Shadow Stack features                                  CET-SS   [Missing]
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Capable]
|- SEV - Encrypted State                                      SEV-ES   [Capable]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Missing]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Memory Encryption                                      SME   [Capable]
|- Transparent SME                                              TSME   [ Enable]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
|- DRAM Data Scrambling                                    Scrambler   [ Enable]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
|- Cache Prefetchers                                                            
   |- L2 Prefetcher                                                L2 HW   < ON>
   |- L1 Stride Prefetcher                                     L1 Stride   <OFF>
   |- L1 Region Prefetcher                                     L1 Region   <OFF>
   |- L1 Burst Prefetch Mode                                    L1 Burst   <OFF>
   |- L2 Stream HW Prefetcher                                  L2 Stream   <OFF>
   |- L2 Up/Down Prefetcher                                   L2 Up/Down   <OFF>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [ ON]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   < ON>
|- Virtualization                                                    SVM   [ ON]
   |- I/O MMU                                                      AMD-V   [ ON]
   |- Version                                                     [         0.1]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  1]
|- Counters:          General                   Fixed                           
|           {  6,  6,  4 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       <OFF>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       <OFF>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x813 ]
|- ACPI Processor C-States                                      _CST   [      2]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
   |- Monitor-Mwait Extensions                                   EMX   [Capable]
   |- Interrupt Break-Event                                      IBE   [Capable]
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- TSC for Performance Profiling                                       [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Processor Performance Control                                _PCT   [ Enable]
|- Performance Supported States                                 _PSS   [      3]
|- Performance Present Capabilities                             _PPC   [      0]
|- Continuous Performance Control                               _CPC   [ Enable]
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [  0: 95 C]
|- CPPC Energy Preference                                        EPP   <      0>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [  480 W]
   |- Minimum Power                                              Min   [  104 W]
   |- Maximum Power                                              Max   [  402 W]
|- Thermal Design Power                                      Package   < Enable>
   |- Power Limit                                                PL1   <  240 W>
   |- Time Window                                                TW1   <   0 ns>
   |- Power Limit                                                PL2   <  240 W>
   |- Time Window                                                TW2   <   0 ns>
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [    4 W]
|- Electrical Design Current                                     EDC   [  452 A]
|- Thermal Design Current                                        TDC   [  111 A]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  115 C]
   |- HTC Temperature Limit                                    Limit   [  106 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [  0.125000000]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0  0   0  0      32  8        32  8       512  8 i  196608 16w 
001:  0    2   0  0   1  0      32  8        32  8       512  8 i  196608 16w 
002:  0    8   0  1   4  0      32  8        32  8       512  8 i  196608 16w 
003:  0   10   0  1   5  0      32  8        32  8       512  8 i  196608 16w 
004:  0   16   2  2   8  0      32  8        32  8       512  8 i  196608 16w 
005:  0   18   2  2   9  0      32  8        32  8       512  8 i  196608 16w 
006:  0   24   2  3  12  0      32  8        32  8       512  8 i  196608 16w 
007:  0   26   2  3  13  0      32  8        32  8       512  8 i  196608 16w 
008:  0   32   4  4  16  0      32  8        32  8       512  8 i  196608 16w 
009:  0   34   4  4  17  0      32  8        32  8       512  8 i  196608 16w 
010:  0   40   4  5  20  0      32  8        32  8       512  8 i  196608 16w 
011:  0   42   4  5  21  0      32  8        32  8       512  8 i  196608 16w 
012:  0   48   6  6  24  0      32  8        32  8       512  8 i  196608 16w 
013:  0   50   6  6  25  0      32  8        32  8       512  8 i  196608 16w 
014:  0   56   6  7  28  0      32  8        32  8       512  8 i  196608 16w 
015:  0   58   6  7  29  0      32  8        32  8       512  8 i  196608 16w 
016:  0   64   8  8  32  0      32  8        32  8       512  8 i  196608 16w 
017:  0   66   8  8  33  0      32  8        32  8       512  8 i  196608 16w 
018:  0   72   8  9  36  0      32  8        32  8       512  8 i  196608 16w 
019:  0   74   8  9  37  0      32  8        32  8       512  8 i  196608 16w 
020:  0   80  10 10  40  0      32  8        32  8       512  8 i  196608 16w 
021:  0   82  10 10  41  0      32  8        32  8       512  8 i  196608 16w 
022:  0   88  10 11  44  0      32  8        32  8       512  8 i  196608 16w 
023:  0   90  10 11  45  0      32  8        32  8       512  8 i  196608 16w 
024:  0    1   0  0   0  1      32  8        32  8       512  8 i  196608 16w 
025:  0    3   0  0   1  1      32  8        32  8       512  8 i  196608 16w 
026:  0    9   0  1   4  1      32  8        32  8       512  8 i  196608 16w 
027:  0   11   0  1   5  1      32  8        32  8       512  8 i  196608 16w 
028:  0   17   2  2   8  1      32  8        32  8       512  8 i  196608 16w 
029:  0   19   2  2   9  1      32  8        32  8       512  8 i  196608 16w 
030:  0   25   2  3  12  1      32  8        32  8       512  8 i  196608 16w 
031:  0   27   2  3  13  1      32  8        32  8       512  8 i  196608 16w 
032:  0   33   4  4  16  1      32  8        32  8       512  8 i  196608 16w 
033:  0   35   4  4  17  1      32  8        32  8       512  8 i  196608 16w 
034:  0   41   4  5  20  1      32  8        32  8       512  8 i  196608 16w 
035:  0   43   4  5  21  1      32  8        32  8       512  8 i  196608 16w 
036:  0   49   6  6  24  1      32  8        32  8       512  8 i  196608 16w 
037:  0   51   6  6  25  1      32  8        32  8       512  8 i  196608 16w 
038:  0   57   6  7  28  1      32  8        32  8       512  8 i  196608 16w 
039:  0   59   6  7  29  1      32  8        32  8       512  8 i  196608 16w 
040:  0   65   8  8  32  1      32  8        32  8       512  8 i  196608 16w 
041:  0   67   8  8  33  1      32  8        32  8       512  8 i  196608 16w 
042:  0   73   8  9  36  1      32  8        32  8       512  8 i  196608 16w 
043:  0   75   8  9  37  1      32  8        32  8       512  8 i  196608 16w 
044:  0   81  10 10  40  1      32  8        32  8       512  8 i  196608 16w 
045:  0   83  10 10  41  1      32  8        32  8       512  8 i  196608 16w 
046:  0   89  10 11  44  1      32  8        32  8       512  8 i  196608 16w 
047:  0   91  10 11  45  1      32  8        32  8       512  8 i  196608 16w

After commenting the bitshift and rebuild it shows as follows

./build/corefreq-cli -c 1 -C 1 -n -s -n -m

CPU Freq(MHz) Ratio  Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)  Min TMP:TS  Max
000   47.56 ( 0.48)   1.49   2.40  97.60   0.00   0.00   0.00  34 / 34:670/ 35
001    3.65 ( 0.04)   0.11   0.20  99.80   0.00   0.00   0.00  34 / 34:670/ 35
002   44.96 ( 0.45)   1.41   2.04  97.96   0.00   0.00   0.00  34 / 34:670/ 35
003   37.08 ( 0.37)   1.16   1.71  98.29   0.00   0.00   0.00  34 / 34:670/ 35
004   12.48 ( 0.12)   0.39   0.64  99.36   0.00   0.00   0.00  33 / 33:658/ 34
005   15.74 ( 0.16)   0.49   0.67  99.33   0.00   0.00   0.00  33 / 33:658/ 34
006   10.27 ( 0.10)   0.32   0.51  99.49   0.00   0.00   0.00  33 / 33:660/ 34
007    1.46 ( 0.01)   0.05   0.08  99.92   0.00   0.00   0.00  33 / 33:660/ 34
008    5.15 ( 0.05)   0.16   0.21  99.79   0.00   0.00   0.00  36 / 36:684/ 36
009    2.77 ( 0.03)   0.09   0.16  99.84   0.00   0.00   0.00  36 / 36:684/ 36
010    1.43 ( 0.01)   0.04   0.08  99.92   0.00   0.00   0.00  36 / 36:684/ 36
011    3.59 ( 0.04)   0.11   0.19  99.81   0.00   0.00   0.00  36 / 36:684/ 36
012    4.28 ( 0.04)   0.13   0.22  99.78   0.00   0.00   0.00  0  /  0:0  /  0
013    2.55 ( 0.03)   0.08   0.13  99.87   0.00   0.00   0.00  0  /  0:0  /  0
014    1.69 ( 0.02)   0.05   0.09  99.91   0.00   0.00   0.00  0  /  0:0  /  0
015    5.36 ( 0.05)   0.17   0.29  99.71   0.00   0.00   0.00  0  /  0:0  /  0
016    1.53 ( 0.02)   0.05   0.08  99.92   0.00   0.00   0.00  34 / 34:670/ 34
017   47.93 ( 0.48)   1.50   2.33  97.67   0.00   0.00   0.00  34 / 34:670/ 34
018    1.39 ( 0.01)   0.04   0.08  99.92   0.00   0.00   0.00  34 / 34:670/ 34
019    1.06 ( 0.01)   0.03   0.05  99.95   0.00   0.00   0.00  34 / 34:670/ 34
020    1.83 ( 0.02)   0.06   0.10  99.90   0.00   0.00   0.00  0  /  0:0  /  0
021    0.96 ( 0.01)   0.03   0.05  99.95   0.00   0.00   0.00  0  /  0:0  /  0
022    2.53 ( 0.03)   0.08   0.13  99.87   0.00   0.00   0.00  0  /  0:0  /  0
023    1.53 ( 0.02)   0.05   0.08  99.92   0.00   0.00   0.00  0  /  0:0  /  0
024    1.49 ( 0.01)   0.05   0.07  99.93   0.00   0.00   0.00  34 / 35:672/ 35
025    1.80 ( 0.02)   0.06   0.09  99.91   0.00   0.00   0.00  34 / 35:672/ 35
026   54.78 ( 0.55)   1.71   2.44  97.56   0.00   0.00   0.00  34 / 35:672/ 35
027   66.80 ( 0.67)   2.09   3.26  96.74   0.00   0.00   0.00  34 / 35:672/ 35
028    4.61 ( 0.05)   0.14   0.22  99.78   0.00   0.00   0.00  33 / 34:664/ 34
029    1.36 ( 0.01)   0.04   0.07  99.93   0.00   0.00   0.00  33 / 34:664/ 34
030    0.68 ( 0.01)   0.02   0.03  99.97   0.00   0.00   0.00  33 / 34:664/ 34
031   14.73 ( 0.15)   0.46   0.81  99.19   0.00   0.00   0.00  33 / 34:664/ 34
032   96.98 ( 0.97)   3.03   3.88  96.12   0.00   0.00   0.00  35 / 36:680/ 36
033   12.24 ( 0.12)   0.38   0.67  99.33   0.00   0.00   0.00  35 / 36:680/ 36
034    1.36 ( 0.01)   0.04   0.07  99.93   0.00   0.00   0.00  35 / 36:680/ 36
035    1.54 ( 0.02)   0.05   0.07  99.93   0.00   0.00   0.00  35 / 36:680/ 36
036    1.69 ( 0.02)   0.05   0.08  99.92   0.00   0.00   0.00  0  /  0:0  /  0
037    2.01 ( 0.02)   0.06   0.10  99.90   0.00   0.00   0.00  0  /  0:0  /  0
038    2.92 ( 0.03)   0.09   0.15  99.85   0.00   0.00   0.00  0  /  0:0  /  0
039    2.88 ( 0.03)   0.09   0.14  99.86   0.00   0.00   0.00  0  /  0:0  /  0
040   20.49 ( 0.20)   0.64   1.00  99.00   0.00   0.00   0.00  34 / 35:672/ 35
041    3.49 ( 0.03)   0.11   0.17  99.83   0.00   0.00   0.00  34 / 35:672/ 35
042    2.21 ( 0.02)   0.07   0.11  99.89   0.00   0.00   0.00  34 / 35:672/ 35
043    1.74 ( 0.02)   0.05   0.08  99.92   0.00   0.00   0.00  34 / 35:672/ 35
044    7.79 ( 0.08)   0.24   0.42  99.58   0.00   0.00   0.00  0  /  0:0  /  0
045    1.22 ( 0.01)   0.04   0.06  99.94   0.00   0.00   0.00  0  /  0:0  /  0
046    7.19 ( 0.07)   0.22   0.37  99.63   0.00   0.00   0.00  0  /  0:0  /  0
047    1.94 ( 0.02)   0.06   0.10  99.90   0.00   0.00   0.00  0  /  0:0  /  0

    Averages:        Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)    TjMax:    Pkg:
                      0.37   0.56  99.44   0.00   0.00   0.00      95 C    36 C

CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000   52.35   121  0.7937   35  000000000000002477    0.037796021   0.037796021
001   16.00   121  0.7937   35  000000000000000823    0.012557983   0.012557983
002    6.11   121  0.7937   35  000000000000000751    0.011459351   0.011459351
003   26.14   121  0.7937   35  000000000000001780    0.027160645   0.027160645
004   16.01   122  0.7875   33  000000000000001222    0.018646240   0.018646240
005   12.48   121  0.7937   33  000000000000000589    0.008987427   0.008987427
006    8.22   122  0.7875   33  000000000000000605    0.009231567   0.009231567
007    2.32   122  0.7875   33  000000000000000707    0.010787964   0.010787964
008    8.32   123  0.7812   36  000000000000005185    0.079116821   0.079116821
009   18.70   122  0.7875   36  000000000000002375    0.036239624   0.036239624
010    3.17   122  0.7875   36  000000000000007279    0.111068726   0.111068726
011   18.92   121  0.7937   36  000000000000004625    0.070571899   0.070571899
012    3.78   120  0.8000    0  000000000000000359    0.005477905   0.005477905
013    4.24   121  0.7937    0  000000000000000404    0.006164551   0.006164551
014    3.90   120  0.8000    0  000000000000001571    0.023971558   0.023971558
015    7.04   121  0.7937    0  000000000000000565    0.008621216   0.008621216
016    4.13   121  0.7937   34  000000000000000259    0.003952026   0.003952026
017   10.21   121  0.7937   34  000000000000000733    0.011184692   0.011184692
018   57.03   121  0.7937   34  000000000000002813    0.042922974   0.042922974
019   44.40   121  0.7937   34  000000000000001847    0.028182983   0.028182983
020    5.50   121  0.7937    0  000000000000000708    0.010803223   0.010803223
021    2.49   121  0.7937    0  000000000000000248    0.003784180   0.003784180
022    3.48   121  0.7937    0  000000000000000734    0.011199951   0.011199951
023    4.49   122  0.7875    0  000000000000000719    0.010971069   0.010971069
024    6.27    80  1.0500   35  000000000000000000    0.000000000   0.000000000
025    2.35    80  1.0500   35  000000000000000000    0.000000000   0.000000000
026   12.86    81  1.0438   35  000000000000000000    0.000000000   0.000000000
027   18.49    80  1.0500   35  000000000000000000    0.000000000   0.000000000
028    5.37    81  1.0438   33  000000000000000000    0.000000000   0.000000000
029    2.28    51  1.2312   33  000000000000000000    0.000000000   0.000000000
030    4.52    81  1.0438   33  000000000000000000    0.000000000   0.000000000
031   14.97    81  1.0438   33  000000000000000000    0.000000000   0.000000000
032   81.63    81  1.0438   36  000000000000000000    0.000000000   0.000000000
033   19.48    80  1.0500   36  000000000000000000    0.000000000   0.000000000
034   75.24    81  1.0438   36  000000000000000000    0.000000000   0.000000000
035   33.71    81  1.0438   36  000000000000000000    0.000000000   0.000000000
036    3.56    81  1.0438    0  000000000000000000    0.000000000   0.000000000
037    2.68    81  1.0438    0  000000000000000000    0.000000000   0.000000000
038   20.42    80  1.0500    0  000000000000000000    0.000000000   0.000000000
039    7.25    80  1.0500    0  000000000000000000    0.000000000   0.000000000
040    1.70    80  1.0500   35  000000000000000000    0.000000000   0.000000000
041    4.95    80  1.0500   35  000000000000000000    0.000000000   0.000000000
042    6.92    80  1.0500   35  000000000000000000    0.000000000   0.000000000
043    2.43    80  1.0500   35  000000000000000000    0.000000000   0.000000000
044    7.71    81  1.0438    0  000000000000000000    0.000000000   0.000000000
045    1.83    81  1.0438    0  000000000000000000    0.000000000   0.000000000
046   15.73    81  1.0438    0  000000000000000000    0.000000000   0.000000000
047    5.50    80  1.0500    0  000000000000000000    0.000000000   0.000000000

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J):  62.897842407   0.600860596   9.785461426   0.000000000   0.000000000
Power(W) :  62.897842407   0.600860596   9.785461426   0.000000000   0.000000000


Processor                                      [AMD EPYC 7F72 24-Core Processor]
|- PPIN#                                                      [ 262185db68cc040]
|- Architecture                                                 [Zen2/EPYC/Rome]
|- Vendor ID                                                      [AuthenticAMD]
|- Firmware                                                        [ 36.119.0-2]
|- Microcode                                                        [0x0830107d]
|- Signature                                                           [  8F_31]
|- Stepping                                                            [      0]
|- Online CPU                                                          [ 48/ 48]
|- Base Clock                                                          [ 99.995]
|- Frequency            (MHz)                      Ratio                        
                 Min   2499.87                    <  25 >                       
                 Max   3199.83                    <  32 >                       
|- Factory                                                             [100.000]
                       3200                       [  32 ]                       
|- Performance                                                                  
                 TGT   2499.87                    <  25 >                       
   |- CPPC                                                                      
                 Min    399.98                    <   4 >                       
                 Max   3699.80                    <  37 >                       
                 TGT   3699.80                    <  37 >                       
   |- Boost                                                            [   LOCK]
                 XFR   3699.80                    [  37 ]                       
                 CPB   3699.80                    [  37 ]                       
   |- P-State                                                                   
                 P1    2999.84                    <  30 >                       
                 P2    2499.87                    <  25 >                       
|- Uncore                                                              [   LOCK]
                 CLK   1599.91                    [  16 ]                       
                 MEM   4799.74                    [  48 ]                       
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [N]    AVX512-DQ [N]  AVX512-IFMA [N]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [N]    AVX512-BW [N]   AVX512-VL [N] 
|- AVX512-VBMI  [N] AVX512-VBMI2 [N]  AVX512-VNNI [N]  AVX512-ALG [N] 
|- AVX512-VPOP  [N] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [N] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y] 
|- VAES         [N]   VPCLMULQDQ [N]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- LOCK prefix to read CR8                                    AltMov   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP CMPSB|SCASB                                   FSRC   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Missing]
|- Fast Short REP STOSB                                         FSRS   [Missing]
|- Fast-String Operation                                        ERMS   [Missing]
|- Fused Multiply Add                                           FMA4   [Missing]
|- Fused Multiply Add                                            FMA   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hyper-Threading Technology                                    HTT   [Capable]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Missing]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Capable]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- OS Visible Work-around                                       OSVW   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- PREFETCHIT0/1 Instructions                              PREFETCHI   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Trailing Bit Manipulation                                     TBM   [Missing]
|- Translation Cache Extension                                   TCE   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Missing]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
|- Extended Operation Support                                    XOP   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Selective Branch Predictor Barrier                           SBPB   [ Unable]
|- Single Thread Indirect Branch Predictor                     STIBP   [Capable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Speculative Return Stack Overflow                      SRSO_NO   [ Unable]
   |- No SRSO at the User-Kernel boundary                              [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [ Unable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [ Enable]
|- Limited Early Redirect Window                            AGENPICK   [Disable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [ Unable]
|- Arch - Enhanced Predictive Store Forwarding                  EPSF   [Missing]
|- Arch - Cross Processor Information Leak                XPROC_LEAK   [Disable]
Security Features                                                               
|- CET Shadow Stack features                                  CET-SS   [Missing]
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Capable]
|- SEV - Encrypted State                                      SEV-ES   [Capable]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Missing]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Memory Encryption                                      SME   [Capable]
|- Transparent SME                                              TSME   [ Enable]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
|- DRAM Data Scrambling                                    Scrambler   [ Enable]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
|- Cache Prefetchers                                                            
   |- L2 Prefetcher                                                L2 HW   < ON>
   |- L1 Stride Prefetcher                                     L1 Stride   <OFF>
   |- L1 Region Prefetcher                                     L1 Region   <OFF>
   |- L1 Burst Prefetch Mode                                    L1 Burst   <OFF>
   |- L2 Stream HW Prefetcher                                  L2 Stream   <OFF>
   |- L2 Up/Down Prefetcher                                   L2 Up/Down   <OFF>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [ ON]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   < ON>
|- Virtualization                                                    SVM   [ ON]
   |- I/O MMU                                                      AMD-V   [ ON]
   |- Version                                                     [         0.1]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  1]
|- Counters:          General                   Fixed                           
|           {  6,  6,  4 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       <OFF>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       <OFF>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x813 ]
|- ACPI Processor C-States                                      _CST   [      2]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
   |- Monitor-Mwait Extensions                                   EMX   [Capable]
   |- Interrupt Break-Event                                      IBE   [Capable]
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- TSC for Performance Profiling                                       [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Processor Performance Control                                _PCT   [ Enable]
|- Performance Supported States                                 _PSS   [      3]
|- Performance Present Capabilities                             _PPC   [      0]
|- Continuous Performance Control                               _CPC   [ Enable]
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [  0: 95 C]
|- CPPC Energy Preference                                        EPP   <      0>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [  480 W]
   |- Minimum Power                                              Min   [  104 W]
   |- Maximum Power                                              Max   [  402 W]
|- Thermal Design Power                                      Package   < Enable>
   |- Power Limit                                                PL1   <  240 W>
   |- Time Window                                                TW1   <   0 ns>
   |- Power Limit                                                PL2   <  240 W>
   |- Time Window                                                TW2   <   0 ns>
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [    4 W]
|- Electrical Design Current                                     EDC   [  452 A]
|- Thermal Design Current                                        TDC   [  111 A]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  115 C]
   |- HTC Temperature Limit                                    Limit   [  106 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [  0.125000000]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0  0   0  0      32  8        32  8       512  8 i  196608 16w 
001:  0    2   0  0   1  0      32  8        32  8       512  8 i  196608 16w 
002:  0    8   0  1   4  0      32  8        32  8       512  8 i  196608 16w 
003:  0   10   0  1   5  0      32  8        32  8       512  8 i  196608 16w 
004:  0   16   1  2   8  0      32  8        32  8       512  8 i  196608 16w 
005:  0   18   1  2   9  0      32  8        32  8       512  8 i  196608 16w 
006:  0   24   1  3  12  0      32  8        32  8       512  8 i  196608 16w 
007:  0   26   1  3  13  0      32  8        32  8       512  8 i  196608 16w 
008:  0   32   2  4  16  0      32  8        32  8       512  8 i  196608 16w 
009:  0   34   2  4  17  0      32  8        32  8       512  8 i  196608 16w 
010:  0   40   2  5  20  0      32  8        32  8       512  8 i  196608 16w 
011:  0   42   2  5  21  0      32  8        32  8       512  8 i  196608 16w 
012:  0   48   3  6  24  0      32  8        32  8       512  8 i  196608 16w 
013:  0   50   3  6  25  0      32  8        32  8       512  8 i  196608 16w 
014:  0   56   3  7  28  0      32  8        32  8       512  8 i  196608 16w 
015:  0   58   3  7  29  0      32  8        32  8       512  8 i  196608 16w 
016:  0   64   4  8  32  0      32  8        32  8       512  8 i  196608 16w 
017:  0   66   4  8  33  0      32  8        32  8       512  8 i  196608 16w 
018:  0   72   4  9  36  0      32  8        32  8       512  8 i  196608 16w 
019:  0   74   4  9  37  0      32  8        32  8       512  8 i  196608 16w 
020:  0   80   5 10  40  0      32  8        32  8       512  8 i  196608 16w 
021:  0   82   5 10  41  0      32  8        32  8       512  8 i  196608 16w 
022:  0   88   5 11  44  0      32  8        32  8       512  8 i  196608 16w 
023:  0   90   5 11  45  0      32  8        32  8       512  8 i  196608 16w 
024:  0    1   0  0   0  1      32  8        32  8       512  8 i  196608 16w 
025:  0    3   0  0   1  1      32  8        32  8       512  8 i  196608 16w 
026:  0    9   0  1   4  1      32  8        32  8       512  8 i  196608 16w 
027:  0   11   0  1   5  1      32  8        32  8       512  8 i  196608 16w 
028:  0   17   1  2   8  1      32  8        32  8       512  8 i  196608 16w 
029:  0   19   1  2   9  1      32  8        32  8       512  8 i  196608 16w 
030:  0   25   1  3  12  1      32  8        32  8       512  8 i  196608 16w 
031:  0   27   1  3  13  1      32  8        32  8       512  8 i  196608 16w 
032:  0   33   2  4  16  1      32  8        32  8       512  8 i  196608 16w 
033:  0   35   2  4  17  1      32  8        32  8       512  8 i  196608 16w 
034:  0   41   2  5  20  1      32  8        32  8       512  8 i  196608 16w 
035:  0   43   2  5  21  1      32  8        32  8       512  8 i  196608 16w 
036:  0   49   3  6  24  1      32  8        32  8       512  8 i  196608 16w 
037:  0   51   3  6  25  1      32  8        32  8       512  8 i  196608 16w 
038:  0   57   3  7  28  1      32  8        32  8       512  8 i  196608 16w 
039:  0   59   3  7  29  1      32  8        32  8       512  8 i  196608 16w 
040:  0   65   4  8  32  1      32  8        32  8       512  8 i  196608 16w 
041:  0   67   4  8  33  1      32  8        32  8       512  8 i  196608 16w 
042:  0   73   4  9  36  1      32  8        32  8       512  8 i  196608 16w 
043:  0   75   4  9  37  1      32  8        32  8       512  8 i  196608 16w 
044:  0   81   5 10  40  1      32  8        32  8       512  8 i  196608 16w 
045:  0   83   5 10  41  1      32  8        32  8       512  8 i  196608 16w 
046:  0   89   5 11  44  1      32  8        32  8       512  8 i  196608 16w 
047:  0   91   5 11  45  1      32  8        32  8       512  8 i  196608 16w

I believe the issue is that my CPU, not sure about other 7F72, isn't quite normal where CCDs do not only increase by 1 or 2, instead, if assuming the sensors output with k10temp enabled is correct, adjusted to start from 0 instead of 1.
The active CCDs are: 0, 1, 2, 4, 6, 7,
Which is further cemented by HWInfo and Core Temp, displaying the same IDs: 0, 1, 2, 4, 6, 7

[cyring]

The active CCDs are: 0, 1, 2, 4, 6, 7,

Well done!

We have two sequences

The first is obvious where CCD is APIC divided by 32 thus SHR 5

But the second sequence 4,6,7 is odd

CPU	APIC	SHR
7	26	0
15	58	1
23	90	2
31	27	0
39	59	1
47	91	2

[cyring]

The STH article shows a lstopo of 8 cores per cluster
The same CCD sequence of [0, 1, 2]

[cyring]

Can you switch to the branch amd_zen_topology_hotfix and check if temperatures are correct ?
If possible in both cases: SMT enable then disable from BIOS

[zaza7]

The best docs so far I've been able to find are https://docs.amd.com/v/u/en-US/2019-amd-epyc-7002-tg-windows-server-56782_1_0 and https://docs.amd.com/v/u/en-US/amd-epyc-7002-tg-hpc-56827 that give some insight into the CCX/CCD layout.
Chapter 2.3 claims up to 4 cores share a 16MB L3 cache per CCX, two CCX per CCD, the number of CCDs possible is 2, 4, 6, 8.
Chapter 2.5 shows the layout of the CCDs, and the possible IDs are 0-7

With that info, and lstopo, we know there are 12 CCXs with 2 cores each, one CCD contains two CCXs, so there should be 6 CCDs total.
As to why my particular CPU has CCDs [0, 1, 2, 4, 6, 7] enabled, my best guess is for heat dissipation, and or perhaps to equally distribute cores across the quadrants.
BIOS allows for enabling / disabling CCDs, fully enabled condition is 6 CCDs, with other options for 2, 3, 4

Switched to the branch amd_zen_topology_hotfix, values reported were not correct with SMT on or off for 16-23 which makes sense as we're trying to monitor something that does not exist, CCD8 and CCD10 for SMT on, CCD8 for SMT off.
Quirk of SMT off is showing 8 cores per CCD which is not possible for the 7F72

SMT enabled

---

16-19 report 0/0/0
20-23 report 83/83-147/147

---

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0  0   0  0      32  8        32  8       512  8 i  196608 16w 
001:  0    2   0  0   1  0      32  8        32  8       512  8 i  196608 16w 
002:  0    8   0  1   4  0      32  8        32  8       512  8 i  196608 16w 
003:  0   10   0  1   5  0      32  8        32  8       512  8 i  196608 16w 
004:  0   16   2  2   8  0      32  8        32  8       512  8 i  196608 16w 
005:  0   18   2  2   9  0      32  8        32  8       512  8 i  196608 16w 
006:  0   24   2  3  12  0      32  8        32  8       512  8 i  196608 16w 
007:  0   26   2  3  13  0      32  8        32  8       512  8 i  196608 16w 
008:  0   32   4  4  16  0      32  8        32  8       512  8 i  196608 16w 
009:  0   34   4  4  17  0      32  8        32  8       512  8 i  196608 16w 
010:  0   40   4  5  20  0      32  8        32  8       512  8 i  196608 16w 
011:  0   42   4  5  21  0      32  8        32  8       512  8 i  196608 16w 
012:  0   48   6  6  24  0      32  8        32  8       512  8 i  196608 16w 
013:  0   50   6  6  25  0      32  8        32  8       512  8 i  196608 16w 
014:  0   56   6  7  28  0      32  8        32  8       512  8 i  196608 16w 
015:  0   58   6  7  29  0      32  8        32  8       512  8 i  196608 16w 
016:  0   64   8  8  32  0      32  8        32  8       512  8 i  196608 16w 
017:  0   66   8  8  33  0      32  8        32  8       512  8 i  196608 16w 
018:  0   72   8  9  36  0      32  8        32  8       512  8 i  196608 16w 
019:  0   74   8  9  37  0      32  8        32  8       512  8 i  196608 16w 
020:  0   80  10 10  40  0      32  8        32  8       512  8 i  196608 16w 
021:  0   82  10 10  41  0      32  8        32  8       512  8 i  196608 16w 
022:  0   88  10 11  44  0      32  8        32  8       512  8 i  196608 16w 
023:  0   90  10 11  45  0      32  8        32  8       512  8 i  196608 16w 
024:  0    1   0  0   0  1      32  8        32  8       512  8 i  196608 16w 
025:  0    3   0  0   1  1      32  8        32  8       512  8 i  196608 16w 
026:  0    9   0  1   4  1      32  8        32  8       512  8 i  196608 16w 
027:  0   11   0  1   5  1      32  8        32  8       512  8 i  196608 16w 
028:  0   17   2  2   8  1      32  8        32  8       512  8 i  196608 16w 
029:  0   19   2  2   9  1      32  8        32  8       512  8 i  196608 16w 
030:  0   25   2  3  12  1      32  8        32  8       512  8 i  196608 16w 
031:  0   27   2  3  13  1      32  8        32  8       512  8 i  196608 16w 
032:  0   33   4  4  16  1      32  8        32  8       512  8 i  196608 16w 
033:  0   35   4  4  17  1      32  8        32  8       512  8 i  196608 16w 
034:  0   41   4  5  20  1      32  8        32  8       512  8 i  196608 16w 
035:  0   43   4  5  21  1      32  8        32  8       512  8 i  196608 16w 
036:  0   49   6  6  24  1      32  8        32  8       512  8 i  196608 16w 
037:  0   51   6  6  25  1      32  8        32  8       512  8 i  196608 16w 
038:  0   57   6  7  28  1      32  8        32  8       512  8 i  196608 16w 
039:  0   59   6  7  29  1      32  8        32  8       512  8 i  196608 16w 
040:  0   65   8  8  32  1      32  8        32  8       512  8 i  196608 16w 
041:  0   67   8  8  33  1      32  8        32  8       512  8 i  196608 16w 
042:  0   73   8  9  36  1      32  8        32  8       512  8 i  196608 16w 
043:  0   75   8  9  37  1      32  8        32  8       512  8 i  196608 16w 
044:  0   81  10 10  40  1      32  8        32  8       512  8 i  196608 16w 
045:  0   83  10 10  41  1      32  8        32  8       512  8 i  196608 16w 
046:  0   89  10 11  44  1      32  8        32  8       512  8 i  196608 16w 
047:  0   91  10 11  45  1      32  8        32  8       512  8 i  196608 16w

SMT disabled

---

16-23 report 0/0/0

---

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0  0   0  0      32  8        32  8       512  8 i  196608 16w 
001:  0    1   0  0   1  0      32  8        32  8       512  8 i  196608 16w 
002:  0    4   0  1   4  0      32  8        32  8       512  8 i  196608 16w 
003:  0    5   0  1   5  0      32  8        32  8       512  8 i  196608 16w 
004:  0    8   0  2   8  0      32  8        32  8       512  8 i  196608 16w 
005:  0    9   0  2   9  0      32  8        32  8       512  8 i  196608 16w 
006:  0   12   0  3  12  0      32  8        32  8       512  8 i  196608 16w 
007:  0   13   0  3  13  0      32  8        32  8       512  8 i  196608 16w 
008:  0   16   4  4  16  0      32  8        32  8       512  8 i  196608 16w 
009:  0   17   4  4  17  0      32  8        32  8       512  8 i  196608 16w 
010:  0   20   4  5  20  0      32  8        32  8       512  8 i  196608 16w 
011:  0   21   4  5  21  0      32  8        32  8       512  8 i  196608 16w 
012:  0   24   4  6  24  0      32  8        32  8       512  8 i  196608 16w 
013:  0   25   4  6  25  0      32  8        32  8       512  8 i  196608 16w 
014:  0   28   4  7  28  0      32  8        32  8       512  8 i  196608 16w 
015:  0   29   4  7  29  0      32  8        32  8       512  8 i  196608 16w 
016:  0   32   8  8  32  0      32  8        32  8       512  8 i  196608 16w 
017:  0   33   8  8  33  0      32  8        32  8       512  8 i  196608 16w 
018:  0   36   8  9  36  0      32  8        32  8       512  8 i  196608 16w 
019:  0   37   8  9  37  0      32  8        32  8       512  8 i  196608 16w 
020:  0   40   8 10  40  0      32  8        32  8       512  8 i  196608 16w 
021:  0   41   8 10  41  0      32  8        32  8       512  8 i  196608 16w 
022:  0   44   8 11  44  0      32  8        32  8       512  8 i  196608 16w 
023:  0   45   8 11  45  0      32  8        32  8       512  8 i  196608 16w