[WIP][Runtime]Pipeline Executor For Compute graph pipeline#7892
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huajsj wants to merge 28 commits into
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[WIP][Runtime]Pipeline Executor For Compute graph pipeline#7892huajsj wants to merge 28 commits into
huajsj wants to merge 28 commits into
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huajsj
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Thanks @tqchen for the follow up, I proposed a RFC(https://discuss.tvm.apache.org/t/rfc-compute-graph-pipeline-with-new-subgraph-executor/9839) to explain the motivation and solution architecture as reference. |
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comaniac
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Reviewed the test for APIs and user interfaces, but it needs lots of changes so I'll stop here for now.
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Alco cc @areusch @tmoreau89
| params : dict of str to NDArray | ||
| Additional arguments | ||
| """ | ||
| if key is not None: |
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Why key and value are allowed to be None?
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Didn't see the fix? Why we need if key is not None?
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I'm busy with other tasks in recent days. Will try to take another look when I got a chance. |
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@comaniac, if you have time , could you help for a review. thanks. |
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areusch,
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junrushao,
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liangfu,
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| template <typename SLOT_TYPE = SLOT> | ||
| void deleteQueue(squeue<SLOT_TYPE>* q) { | ||
| free(q); |
masahi
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Sep 3, 2021
| #include <assert.h> | ||
| #include <sched.h> | ||
| #include <string.h> | ||
| #include <sys/syscall.h> |
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Thanks @huajsj. Please respect our coding style and standard good programming practices:
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HungYangChang
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Oct 1, 2021
[Finding]
the final output is same with constant value, seems like input data is
0, this is because the get input index have a '+1' operation, but the
input index already start from 0. the means when doing setinput('x',..) it
should get convert to setinput(0, ..), but the wrong logic is
setinput(1,..).
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IIUC, this PR should be out-of-date? Should we close? |
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@comaniac , yes we should close this PR, closed it now. |
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Issue:
SOC hardware plarform have multiple types compute chipset like
GPU,FPGA,APU,RPU etc, there is a requirement that use these compute
unit in parallel to reach best performance.
Solution:
In these pipeline solution, we first split the compute graph into
a group of subgraph, then run these subgraph in a pipeline module
to make the GPU/FPGA/APU/RPU parallel running become possible.
Thanks for contributing to TVM! Please refer to guideline https://tvm.apache.org/docs/contribute/ for useful information and tips. After the pull request is submitted, please request code reviews from Reviewers by @ them in the pull request thread.