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FinnWilkinson
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jj16791
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A couple of changes/clarifications needed
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FinnWilkinson
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Minor changes needed, along with existing issues pointed out by other reviewers
…mplementation to be architecture agnostic.
…han install location.
…direction due to emergent bug
…arding operands from flushed loads
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* Moved counter timer logic from main into Architecture, allowing the implementation to be architecture agnostic. * Added test for CNTVCT register. * Updated sveGetPattern auxiliary function to work for any instruction string. * Ensured all necessary SVE instructions included pattern recognition. * Changed specialFiles generation directory to be the build location. * Fixed AArch64_LD1RQ_D_IMM's invalid increments of its index variable. * Improved conditional branch not taken target and remove loop closing direction due to emergent bug. * Resolved LSQ bugs for comparisons against the total req limit and forwarding operands from flushed loads. * Updated comment in sveGetPattern Aux function.
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* Moved counter timer logic from main into Architecture, allowing the implementation to be architecture agnostic. * Added test for CNTVCT register. * Updated sveGetPattern auxiliary function to work for any instruction string. * Ensured all necessary SVE instructions included pattern recognition. * Changed specialFiles generation directory to be the build location. * Fixed AArch64_LD1RQ_D_IMM's invalid increments of its index variable. * Improved conditional branch not taken target and remove loop closing direction due to emergent bug. * Resolved LSQ bugs for comparisons against the total req limit and forwarding operands from flushed loads. * Updated comment in sveGetPattern Aux function.
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This PR addresses issues #238 and #237; Making Processor and Virtual counter timer logic architecture agnostic and ensuring all relevant SVE instructions have predicate pattern recognition.
Also, the specialFiles generation directory has been changed from the project source to the project build directory.