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fix(ci): drop specs/t27os/pty_server.t27 from the Verilog width ledger (Closes #12955) - #12958
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Closes #12955) The Verilog widths check fails on master with "1 ledgered spec(s) no longer carry an absurd width. Drop them from the ledger: specs/t27os/pty_server.t27" (jobs 124422384443 and 124439191910). The spec now takes its arena size from the constant MEM_SIZE of t27os::pty_logic, so the scan reports no absurd width for it. One data line is removed and the comment block is cut down to the entry that stays (glass_window). Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
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Merge basis: required checks green; inherited failure documented.
🤖 Addressed by Claude Code |
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One data file, no code. The
Verilog widths (absurd-width ledger)check fails on master at step "Scan the corpus" with "FAIL: 1 ledgered spec(s) no longer carry an absurd width. Drop them from the ledger: specs/t27os/pty_server.t27" (master jobs 124422384443 on 5bba61c and 124439191910 on d8e8c1d).tools/verilog_width_baseline.txt: the linespecs/t27os/pty_server.t27is dropped and the comment block is cut down to the entry that stays (glass_window). The spec's arena size is the constantMEM_SIZEimported fromt27os::pty_logic, and the scan reports no absurd width for it.Diff: 1 file, 7 added and 8 deleted lines, 0 non-t27 code.
Closes #12955
Refs #10782
🤖 Generated with Claude Code