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fix(ci): drop specs/t27os/pty_server.t27 from the Verilog width ledger (Closes #12955) - #12958

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gHashTag merged 1 commit into
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lane/widths-ledger-12955
Oct 31, 2026
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gHashTag merged 1 commit into
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lane/widths-ledger-12955

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One data file, no code. The Verilog widths (absurd-width ledger) check fails on master at step "Scan the corpus" with "FAIL: 1 ledgered spec(s) no longer carry an absurd width. Drop them from the ledger: specs/t27os/pty_server.t27" (master jobs 124422384443 on 5bba61c and 124439191910 on d8e8c1d).

  • tools/verilog_width_baseline.txt: the line specs/t27os/pty_server.t27 is dropped and the comment block is cut down to the entry that stays (glass_window). The spec's arena size is the constant MEM_SIZE imported from t27os::pty_logic, and the scan reports no absurd width for it.

Diff: 1 file, 7 added and 8 deleted lines, 0 non-t27 code.

Closes #12955
Refs #10782

🤖 Generated with Claude Code

Closes #12955)

The Verilog widths check fails on master with "1 ledgered spec(s) no longer
carry an absurd width. Drop them from the ledger: specs/t27os/pty_server.t27"
(jobs 124422384443 and 124439191910). The spec now takes its arena size from
the constant MEM_SIZE of t27os::pty_logic, so the scan reports no absurd
width for it. One data line is removed and the comment block is cut down to
the entry that stays (glass_window).

Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
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Generated at: 2026-10-31 04:40:24 UTC

Summary

Status Count
Total Open PRs 29
PRs with Failing Checks 28
PRs with All Checks Green 1
READY 0
FAILING 28
PENDING 0
NO CHECKS YET 0

These columns do not partition: 0 + 28 + 0 + 0 = 28, and there are 29 open PRs. A PR is being counted twice or not at all.

Seal Status

  • ⚠️ STALE -- sha256(compiler.rs)=e75b498e5e79 != manifest seal=87e5cbd3ad94.
    The committed NMSE numbers were certified against an older compiler.rs.
    Run scripts/reseal-check.sh locally for the two-step reseal command (advisory; not a merge gate).

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Merge basis: required checks green; inherited failure documented.

🤖 Addressed by Claude Code

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gHashTag merged commit 4680281 into master Oct 31, 2026
28 of 32 checks passed
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gHashTag deleted the lane/widths-ledger-12955 branch October 31, 2026 04:57
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Verilog widths ledger: drop specs/t27os/pty_server.t27, it no longer carries an absurd width (master red)

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