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feat(minimax_h3): add reference-to-video and the OmniRef 8-step student - #1931
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chaofengw-nv wants to merge 41 commits into
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Restore the family-owned original image-reference pipeline and its staged bundle writer on the current API. Keep automatic support discovery and the original single-window public behavior unchanged. Add private synchronized AV guide layout, target-only sampling, clean-audio AdaLN cache invalidation, global window clocks and channel-correct latent-tail accumulation. Add a real backend guide trajectory oracle without changing the existing FP32/BF16 criteria. Validation: 280 CPU family/bundle regressions, one new guide profile test, four C++ host executables, 176 exact upstream layout vectors and 13 exact upstream clock windows passed. The new GPU guide oracle is not yet executed. The retained trained encoder/video failures remain unqualified; this commit does not advertise trained continuation or production quality. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Add a separate 226-frame experimental bundle profile with synchronized video/audio latent guides, two complete 49-forward windows and cumulative decoding. Preserve the original single-window profile and residency options. Reject child profile limits before first-window inference, retain each stereo channel prefix, and serialize the complete request across the AdaLN cache transition. Add an independent native 98-forward oracle with synthetic weights. Validation: CPU family regression and window fixture, six host executables, native probe syntax, family ownership and formatting checks passed. The new GPU oracle and full trained continuation remain unqualified on this revision. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Build the two changed continuation plans from a pinned original image bundle. Verify its complete digest, original profile, checkpoint, tokenizer and BF16 provenance before loading weights; stream and rehash the six unchanged plans. Record reused plan digests and preserve the original bundle. Share exact runtime metadata with the existing full builder. Runtime and graph math are unchanged. Validate both residency presets, source mismatches, streaming mutation rejection and the existing full build wiring with 59 CPU cases; ownership and formatting checks pass. Full trained execution remains unqualified until the target build and video validation complete. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Allow an explicit second-window prompt on the bounded 226-frame Ref2VA profile. Encode both prompts with the original references, validate child conditioning before first-window inference, and anchor both windows after the longest text prefix as in the fixed upstream implementation. Keep empty and identical prompt behavior, original sampling, media clocks, and residency policies. Add shorter/longer text trajectory cases without changing numerical criteria. Host validation passes; GPU trajectories and trained dialogue quality remain to be verified. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Apply repository-pinned clang-format 22.1.8 to the source-quality diagnostics. Only whitespace and comment wrapping change; preprocessed C++ token streams and all numerical criteria are unchanged. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Recognize checkpoint snapshot identities within the owning family instead of importing the internal provenance collector. Preserve source-bundle and checkpoint matching criteria and compare the local identity against the existing behavior. Keep all direct-staging assertions in the existing bundle-writer test module to preserve the closed shared-tree contract. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Signed-off-by: chaofengw <chaofengw@nvidia.com>
Select one of eight precomposed BF16 video/audio output-head banks in a strongly typed TensorRT graph, retaining explicit operand and output rounding around FP32 accumulation. Add a synthetic GPU oracle for all eight selectors, three dynamic row profiles and the trained hidden width. CPU request validation and scope preflight pass; complete student graph, VSA and trained-model qualification remain required. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Bind both dynamic modalities and the PDD selector before inferring output dimensions in the GPU component oracle. Retain shape diagnostics for each case so a binding failure is distinguishable from numerical disagreement. Keep the original graph, 72 cases and BF16 comparison limits unchanged. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Add segment-pure 128-token transport, independent reference-video key budgets and the learned compression boundary. Implement the operation through TVM-FFI with generic and optional Blackwell backends, and compose it with the existing owner-local H3 backbone and eight PDD output heads. CPU regressions pass 157 cases and seven pinned upstream geometry cases. CUDA compilation, trained numerical validation and native student runtime integration remain required; the earlier output-head mismatch is unwaived. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Select the released eight-forward student recipe explicitly, preserving original H3 scheduling and fixed conditioning. Bind native 128-token VSA geometry and the trained head selector for each window. Validate the closed checkpoint contract, native schedules and transport against pinned source math. Add a real TensorRT VSA component oracle; target GPU compilation and trained-model qualification remain required. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Admit the pinned student contract and exhaustive parameter index, rebuild both student partitions, and reuse only explicitly compatible common plans from a verified source bundle. Write native serialized host buffers directly into the bundle to avoid the second plan-sized Python bytes allocation. Preserve the original bytes API and original continuation defaults. Host checks cover partition ownership, metadata, source rejection, short writes and unchanged common sections; trained model and target memory qualification remain pending. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Distinguish the synthetic text segment from the complete Qwen image-token prefix. Preserve the existing workload and numerical criteria; the component case does not qualify a full six-reference request. Signed-off-by: chaofengw <chaofengw@nvidia.com>
The local block-output ITensor overwrote the caller's serialization stream, so a completed TensorRT build tried to invoke ITensor.write(). Keep the block tensor separate from the optional destination to restore both the default bytes API and native host-buffer streaming. Add four real TensorRT deserialization round trips for bytes/streamed output and features/native-timesteps inputs. CPU validation: 56 passed and six GPU cases deselected. Target GPU execution remains pending; no model shapes, precision boundaries or numerical thresholds change. Signed-off-by: chaofengw <chaofengw@nvidia.com>
The output-head marking loop also reused the serialization destination's name. Keep those ITensors separate so the complete student builder passes the actual writer through to native serialization. This was caught during pre-launch review; no DiT build was submitted with the earlier fix. Validation: 78 CPU checks passed, six GPU cases deselected. All three streaming builder entry points retain their output parameter. Model math, shapes, precision and numerical thresholds remain unchanged. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Allow an explicit denoiser_workspace_bytes budget while retaining the 8-GiB default and the separate AdaLN budget. Record both limits in the build receipt. The full VSA transport graph can require a tactic larger than the previous limit; selecting more scratch does not change its input profiles, weights, precision, sampling or correctness gates. Validation: 96 CPU checks passed and six GPU cases deselected. Coverage includes default and explicit per-plan budgets, invalid values rejected before weight loading, and unchanged student/runtime contracts. Full GPU bundle construction remains pending. Signed-off-by: chaofengw <chaofengw@nvidia.com>
The native Ref2VA pipeline checked every recipe against the original H3 49/98-forward counts after denoising. Valid OmniRef PDD outputs therefore failed before video and audio decoding. Validate the existing recipe contract: original H3 requires 49/98 forwards, and OmniRef PDD requires 8/16. Reject unknown recipes, unsupported window profiles, and all other counts. Preserve the denoising schedule and model precision, shapes, weights, and numerical gates. Add CPU regressions for both recipes and window profiles, including wrong counts and invalid configuration. The focused test reproduces the stale guard failure before this fix; the full pipeline host regression passes after it with both residency modes. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Replay saved operands through the unchanged native FFI function and retain routing, compression, and fine-attention observations. Compare the original gated result against its original reference and numeric limits. A separate zero-gate call exposes fine attention for diagnosis only. It cannot qualify the original failing case or the trained model. Preserve all original input and reference files. Validation: Ruff and Python compilation passed. Real GPU localization remains pending. No production graph or kernel changes are introduced. Signed-off-by: chaofengw <chaofengw@nvidia.com>
The optimized 128-token attention discarded the softmax probability residual before PV. Retain a second BF16 limb in the unused half of the QK tensor-memory tile and accumulate both products into the existing FP32 output. Wait for both limbs before the PV handoff; keep the 64-token path unchanged. A family-owned CPU experiment on saved operands isolates probability storage. Its sampled result supports the change but does not qualify CUDA numerical agreement, performance, trained-model quality or the application. Preserve the existing reference and tolerances for GPU validation. Signed-off-by: chaofengw <chaofengw@nvidia.com>
The released cubic exponential approximation can move BF16 attention across a rounding boundary, which a cancelling gated sum exposes. Use the existing hardware exponential path for the optimized 128-token operation. Preserve the 64-token path, probability residual, workspace and BF16 I/O boundaries. Add a family-owned CPU counterfactual on saved boundaries. It reproduces both fused outputs bitwise and attributes the remaining discrepancies to fine-attention rounding. The cubic simulation explains the observed error pattern; it is diagnostic evidence, not GPU or trained-model qualification. Keep the reference, operands, seeds and numeric limits unchanged. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Accumulate a third BF16 probability limb without increasing the workspace, TMEM or shared-memory allocation. Reuse the epilogue buffer before final PV, wait for the previous TMA read, and hand it back after the MMA completion. Keep the hardware exponential and the original BF16 I/O boundaries. Extend the family CPU diagnostic to project the remaining cancelling queries. Allow the GPU oracle to collect all numeric results before exiting nonzero; its default remains fail-fast and every original comparison still must pass. Reference, comparison, case/seed data and tolerances are unchanged. CUDA numerics, synchronization and performance still require target validation. Signed-off-by: chaofengw <chaofengw@nvidia.com>
The unchanged 56-head component profile includes 708 physical tiles and declares 285624192 bytes of BYOK scratch, exceeding the historical 256 MiB builder pool. Size the oracle builder pool from the declared operation bound while retaining its previous minimum. Keep every operand, reference, case, seed, comparison and tolerance unchanged. This fixes a build-resource error and does not resolve existing numerical failures. The 22 family VSA CPU tests pass. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Add an offline diagnostic for immutable saved failing coordinates. Compare FP64 attention with approximate FP32 scaling and softmax operation orders, retaining direct nearest-even BF16 rounding across FP32 midpoints. Keep native fine values explicitly conditional until directly recorded. The diagnostic does not replace the GPU oracle or change inputs, masks, precision boundaries or tolerances. All 29 focused VSA and rounding CPU tests pass. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Record call geometry and host entry/enqueue boundaries only when the explicit trace environment switch is enabled. Preserve all device computations, original asynchronous behavior and correctness gates. Document that enqueues and optional launch-blocking diagnostic times are not benchmark evidence. Validation: all 29 existing VSA layout, transport and rounding-observation CPU checks pass. CUDA compilation, device-instruction comparison and bounded native failure localization remain separate checks. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Keep the third probability limb in dedicated shared tiles rather than borrowing the output epilogue buffers and waiting on their TMA lifetime. Reassign two KV ring stages to the tiles within the existing shared-memory reservation; retain all three PV products and the external scratch contract. Include absolute host trace timestamps to distinguish a stalled call from setup time. CPU layout and rounding contracts pass; GPU output parity and full-request progress remain to be verified. Signed-off-by: chaofengw <chaofengw@nvidia.com>
A one-slot KV ring cannot prefill both K tiles before Q: the producer waits for MMA to release the first K slot while MMA is waiting for Q. Prefill Q first when the ring cannot hold the initial K loads. Keep the four-slot 64-token order, probability limbs and shared-memory reservation unchanged. CPU layout and rounding contracts pass. The saved-output preservation and original full-request stall checks remain required. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Replace generic online attention with separately scaled FP32 Q/K, explicit masked softmax and FP32 PV inside the owning TVM-FFI binding. Complete compression first and reuse its dead scratch while retaining routing indices, counts and compressed output. Keep optimized Blackwell arithmetic available and reject old generic bundles with insufficient scratch. The existing 56-head large workspace sizes stay unchanged. Host layout checks and 32 focused CPU tests pass; integrated GPU and trained-model qualification remain required. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Singleton SGEMM changes the PV accumulation order on the complete saved interleaved case. Use two independent batched products while retaining one head of residency: dead Q holds one output, the fine tile the other, and the completed key mask holds device pointers. Keep every arena size unchanged and assert output/input/pointer-table separation in the host workspace checks. All 32 focused CPU tests pass; complete integrated GPU gates remain required. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Use the existing FP32 warp and block reductions with explicit division for compression probabilities. Valid INT32 tile sizes directly mask empty keys, retaining the external workspace and BF16 boundaries. A complete saved-output diagnostic isolated the sixteen remaining large-case failures to compression rounding after the old reduction. Keep fine attention and the runtime ABI unchanged. Updated complete-case GPU qualification remains pending. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Keep the compressed output at the front and routing indices at the aligned tail of caller-provided scratch. Fit up to 32 independent original query tiles between them while retaining one head of FP32 K/V, separate regional masks, and disjoint QK/PV destinations. Reuse dead PV output and completed masks for device pointer tables. Preserve the duplicate PV reduction when only one query is active, and leave the external workspace contract and BF16 boundaries unchanged. CPU lifetime and capacity checks pass; complete GPU numeric and performance evidence remain required. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Load H3 plans from validated bundle sections instead of retaining serialized plan vectors alongside TensorRT deserialization. Keep plan selection and file identity checks inside the family. Add an optional backend reader contract without changing the existing IBackend vtable. TensorRT reads the original plan bytes through IStreamReaderV2 with a bounded pinned transfer buffer, caller-stream synchronization and engine-owned reader lifetime. Unsupported backends retain the buffered path; failed streamed loads propagate without retrying through it. Cover section bounds and mutations, large sparse inputs under a memory limit, async transfer failure lifetimes, legacy fallback, and deferred cross-DSO option forwarding with CPU tests. Real-engine memory and output parity remain to be qualified on the target TensorRT stack. Signed-off-by: chaofengw <chaofengw@nvidia.com>
A multipart /v1/videos request that uploads input_reference images now runs a references_text_to_audio_video bundle. The native worker passes the images to the Task as RGB references and writes the frames and a 16-bit PCM WAV; the control plane packages the clip with its audio as AAC. The seed and continuation_prompt form fields map to the Task config. trtmc-server gains --byok-library, --byok-function and --byok-name so a bundle that needs a bring-your-own kernel, such as the H3 OmniRef VSA kernel, loads in the persistent worker. Checked with CPU tests and one FastH3 Omni 8-step request on a GB300: three references, 226 frames at 768x1344 and 24 fps with stereo audio. Signed-off-by: chaofengw <chaofengw@nvidia.com>
`python -m tensorrt_model_connect minimax_h3 build-omniref -o OUT --scratch DIR --bridge libtrtmc_byok_tvm_ffi.so --kernel-library libtrtmc_minimax_h3_omniref_vsa.so` runs the explicit experimental FastH3 OmniRef 8-step build from the command line: the original MiniMax-H3 two-window six-portrait bundle first (kept in the scratch directory and reused on the next run), then the student bundle that rebuilds the AdaLN and denoiser plans and reuses the other six. The VSA kernel is registered through the TVM-FFI bridge before the student's plans are built, and the DiT gets a 24 GiB tactic workspace by default (--denoiser-workspace-gib), the limit the released FastH3 bundle's reuse receipt records; with the 8 GiB default TensorRT finds no implementation for the VSA transport fusion. The command drops the page cache of the 128 GB source bundle after hashing it, because on coherent-memory systems such as GB300 that cache occupies the GPU's NUMA node and starves the engine build. Checked on a GB300: both bundles built (about 6 minutes each) and the student bundle rendered a three-reference clip. Applications can then build the bundle through the public family CLI instead of importing family modules. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Keep serialized-input contracts in the existing bundle and backend headers, and the TensorRT reader in the backend module header. Compile the existing bundle and module test files in separate CPU modes to preserve every reader assertion and CTest case without adding shared files. The unchanged source-quality suite passes all 307 tests. The six runtime tests and CPU stream-transfer ASan/UBSan checks pass with the consolidated layout. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Separate pointer classification and bounded device copies from the serialized-input callback. Split CPU transfer and cross-DSO scenarios into named test functions while preserving their input values, assertions, ordering, and failure behavior. The unchanged core complexity gate now reports a maximum CCN of 10. All six runtime CPU cases still pass; no source-quality gate or numerical criterion changes. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Apply clang-format 22.1.8, the version the source-quality gate pins, to the VSA kernels and the workspace test, and give that test the standard native SPDX block. No code changes. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Every family builder config sets its optimization level explicitly. The standalone output-head projection plan used TensorRT's default, so pin that default (3) instead of changing the plans it builds. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Family code must not hash sources, plans or bundle data. The continuation and OmniRef builds checked a caller-supplied SHA-256 of the whole source bundle and of every reused section, and runtime.json carried digests of the component configs. Reuse now relies on what identifies a compatible source: the bundle header and complete section layout, runtime.json equal to the expected original profile, the same pinned checkpoint and BF16 build settings in its provenance, and a byte-equal tokenizer. The source file must stay the same file (device, inode, size and mtime) while plans are copied. Builds no longer read the whole source bundle up front. runtime.json drops config_sha256 and the runtime stops requiring it; older bundles still load. The reuse receipt lists the reused and rebuilt sections. Signed-off-by: chaofengw <chaofengw@nvidia.com>
The oracle, localize and replay scripts under tests/ were tools for chasing numerical mismatches against local caches. They pinned inputs and upstream sources by SHA-256, wrote evidence reports and one assumed a host path. No other family keeps such tools, and family code must not hash data. Remove them, the tests that only exercised them, and the factory probe only they used. The remaining tests keep their checks without digests: the trained video decoder compares cold/warm and cross-preset outputs byte for byte and always generates its upstream reference, the trained audio decoder and native window tests rely on the pinned checkpoint revision and supplied upstream source. Signed-off-by: chaofengw <chaofengw@nvidia.com>
The OmniRef VSA binding read TRTMC_MINIMAX_H3_VSA_BACKEND to force a generic or Blackwell route and TRTMC_MINIMAX_H3_VSA_TRACE to print host timing for every call. Both are environment side channels in production code. The binding now always takes the optimized route when the library was compiled with the Blackwell cubins for the active GPU and the generic route otherwise, which is what the default "auto" did. The trace and the headers only it used are gone. Signed-off-by: chaofengw <chaofengw@nvidia.com>
Rewrite the family README around what a user needs: the build-omniref command and its disk and memory needs, the Python entry point, presets, reference capacity, bundle layout, the request contract, continuation, the OmniRef student, plan reuse and the tests. Drop measurements of individual builds and requests, experiment history and the commands of the removed investigation scripts. Keep the known failing trained encoder comparison as an open gap. Signed-off-by: chaofengw <chaofengw@nvidia.com>
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Background
MiniMax-H3 on
maingenerates video with audio from text. Reference-to-video keeps the people and places of a story consistent across shots: the caller passes reference images and the model renders them into the clip. The follow-up short-drama app PR depends on this path.This work was first posted as several drafts. #1844 (two-window Ref2VA) failed Community CPU:
test_family_production_does_not_hash_sources_plans_or_bundle_dataflagged its content digests. #1847 (streamed plan inputs) passed Community CPU and internal premerge on its own. Both were closed so the work could land as one reviewable change. This PR rebases the complete stack onto currentmain, takes #1847 in its final reviewed form, and fixes what the repository's checks reject.Exit Criteria
FastVideo/FastVideo-FastH3-Omni-8-Step-V1OmniRef student bundle;python -m tensorrt_model_connect minimax_h3 build-omnirefbuilds both.trtmc-serverserves a reference-to-video bundle through/v1/videoswith reference images and an optional continuation prompt, after registering the family's VSA kernel through the generic BYOK bridge.support.pyis unchanged); any claim of trained-output quality, numerical equivalence of the complete pipeline with upstream, or real-time generation.Implementation
families/minimax_h3: the original image-reference path. This covers the Qwen vision and reference-aware text encoders, the VAE encoder and reference posterior, the reference AdaLN and DiT builders, and the native pipeline (factory,ImageReferenceDenoiser, two-windowrun_windowswith an optionalcontinuation_prompt). New runtime schemasminimax_h3.image_ref2va/v1andminimax_h3.image_ref2va_continuation/v1.reference_pdd.py(sampling contract and PDD output-head math),reference_pdd_builder.py,reference_pdd_dit_builder.py,reference_vsa.pyandkernels/omniref_vsa.cu. The kernel is a TVM-FFI BYOK binding with a generic SM80+ route and optional sm100a/sm103a cubins. Schemasminimax_h3.omniref_pdd/v1andminimax_h3.omniref_pdd_continuation/v1.reference_build.buildbuilds the original bundle with single-file direct staging incore/builderBundleWriter.reference_continuation_build.buildandreference_pdd_build.buildrebuild only their changed plans and copy the others from an existing original bundle.build-omniref(cli.json,cli.py) runs the original build and then the student build.core/runtime: streamed plan loading, identical to the last head of perf(runtime): stream MiniMax-H3 engine inputs #1847 (its three commits).apps/server:--byok-library,--byok-functionand--byok-nameregister a kernel before bundles load./v1/videosacceptsinput_referenceimages andcontinuation_promptfor reference tasks and returns the clip with its audio.tests/, and the digest pins in the remaining tests, are removed;TRTMC_MINIMAX_H3_VSA_BACKENDandTRTMC_MINIMAX_H3_VSA_TRACEare removed);runtime.jsonno longer carriesconfig_sha256, and the runtime ignores the key, so earlier bundles still load. Reusing plans from such a bundle is refused because itsruntime.jsondiffers; rebuild the source bundle first.Change categories
Validation
Commands and Results
The CPU checks below ran in a fresh copy of this head with the GPU hidden (
CUDA_VISIBLE_DEVICES=):python tools/legal_headers.py --check,python -m tools.model_ci validate,python tools/check_cyclomatic_complexity.py core/runtime --max-ccn 10 --top 20: passed.ruff check --config ruff.toml(0.16.4) andclang-format --dry-run --Werror(22.1.8) on every changed file;git diff --check: passed.tools/tests/test_community_ci.pyandtools/tests/test_merge_ready_slack_alert.py, which needjq; it was not installed in that container. This PR does not touch those tools.pytest families/minimax_h3/tests -m "not gpu and not trt": 404 passed, 1 skipped.pytest apps/server/python/tests: 238 passed.cmake -DTRTMC_BUILD_TESTS=ON+ctest --label-exclude gpu: everyminimax_h3and core runtime test passed (18 family tests, plusbundle_format_v1,bundle_stream_reader,trt_plan_stream_reader_cpu,family_loaderandserver_video_worker). Six tests of other families failed at "create CUDA stream" because the GPU was hidden.sana_wmdid not compile because that container's torch addscompute_50.minimal,six_portrait, two windows), was served bytrtmc-serverbuilt from the original stack and then from this head. Each server rendered the same reference-to-video request: four reference images, a prompt plus acontinuation_prompt, and seed 42. The output is a 9.42 s clip of 226 frames at 768x1344 and 24 fps, with stereo 32-kHz audio. The two MP4 files are byte-identical (259,544,471 bytes); generation took 721 s and 711 s. This also shows that a bundle whoseruntime.jsonstill carriesconfig_sha256loads.Hardware, Environment, and Revisions
Head based on
mainat2c2256cc5. One NVIDIA GB300 in an aarch64 Ubuntu 24.04 container with TensorRT 11.2.0.113, CUDA 13.0 and torch 2.12.0+cu130. Checkpoints:MiniMaxAI/MiniMax-H3at48d93ede732756e404a3b1b2f3b3a9b5a22f6cfc,FastVideo/FastVideo-FastH3-Omni-8-Step-V1at53e0d26a1691aa473b6262d8196a8feb2c297df0.Not Run / Remaining Gaps
families/minimax_h3/tests(component and trained-model comparisons with upstream) were not run on this head.build-omnirefwas not rerun from scratch on this head: the two bundles need about 250 GB of free disk. The changed reuse code is covered by the CPU build tests above. The runtime check above used a bundle built before the cleanup.rtol=1.3e-6,atol=1e-5on 54 of 12,288 moments. Thresholds were not changed.Contributor Self-Review
Notes For Future Readers
core/runtimeandcore/builder(perf(runtime): stream MiniMax-H3 engine inputs #1847 and direct staging);apps/server;families/minimax_h3;kernels/omniref_vsa.cu;families/minimax_h3/README.mddocuments build commands, presets, capacity, bundle layout, the request contract and the known gaps.Risk level
Large and experimental. The new MiniMax-H3 paths are opt-in and not selected by discovery. The shared changes are #1847's streamed plan loading, which passed internal premerge on its own; additive
BundleWriterstaging; and opt-in server options.