Repository navigation
Load the MLA query RoPE dims contiguously in the forward kernel - #8141
Merged
sraman-rgb merged 6 commits intoOct 16, 2026
Merged
Conversation
The in-place query RoPE forward (_mla_rope_fwd_inplace_kernel) read the emb_dim RoPE elements of every head with two stride-2 loads, one for the even and one for the odd elements, and with remove_interleaving it wrote them back with two stride-2 stores. It now loads them with one contiguous load and splits the even and odd elements in registers, and writes the remove_interleaving output with one contiguous store. For DeepSeek-V3's query, [4096, 1, 128, 192] in bf16, the kernel takes 11.3 us instead of 18.7 us on VR200. With the new load the compiler paired the products into FMAs differently, and its pairing also changed with BLOCK_H. The FMAs are now formed explicitly, with the pairings the two-load kernel compiled to, so the output is bit-identical to before at every BLOCK_H the autotuner can choose and no longer depends on BLOCK_H or num_warps. The exception is fp32 q with bf16 cos/sin and inverse=True, where the previous output itself changed with BLOCK_H; it now equals the previous small-BLOCK_H output. The query replay test now also covers remove_interleaving=True. Signed-off-by: Siddhartha Raman S <sraman@nvidia.com> Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
svcnvidia-nemo-ci
marked this pull request as draft
October 12, 2026 14:14
Contributor
|
This PR has been automatically converted to draft because all PRs must start as drafts. When you are ready for review, click Ready for Review to begin the review process. This will:
See the contribution guide for more details. |
yaoyu-33
approved these changes
Oct 12, 2026
lmcafee-nvidia
approved these changes
Oct 14, 2026
sraman-rgb
enabled auto-merge
October 14, 2026 17:32
Contributor
Author
|
/ok to test a941f26 |
github-merge-queue
Bot
removed this pull request from the merge queue due to a conflict with the base branch
Oct 15, 2026
Resolve the conflict in the fused Triton kernel replay tests, where main now checks that the MLA query RoPE output is finite and this branch adds remove_interleaving to the test's label. Both are kept. Signed-off-by: Siddhartha Raman S <sraman@nvidia.com> Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Contributor
Author
|
/ok to test 69322fb |
Contributor
Author
|
/ok to test cdf2549 |
|
🔄 Merge queue validation started! You can track the progress here: https://github.com/NVIDIA/Megatron-LM/actions/runs/38966892068 |
This branch was previously deployed
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
The in-place query RoPE forward (_mla_rope_fwd_inplace_kernel) read the emb_dim RoPE elements of every head with two stride-2 loads, one for the even and one for the odd elements, and with remove_interleaving it wrote them back with two stride-2 stores. It now loads them with one contiguous load and splits the even and odd elements in registers, and writes the remove_interleaving output with one contiguous store. For DeepSeek-V3's query, [4096, 1, 128, 192] in bf16, the kernel takes 11.3 us instead of 18.7 us on VR200.
With the new load the compiler paired the products into FMAs differently, and its pairing also changed with BLOCK_H. The FMAs are now formed explicitly, with the pairings the two-load kernel compiled to, so the output is bit-identical to before at every BLOCK_H the autotuner can choose and no longer depends on BLOCK_H or num_warps. The exception is fp32 q with bf16 cos/sin and inverse=True, where the previous output itself changed with BLOCK_H; it now equals the previous small-BLOCK_H output.
The query replay test now also covers remove_interleaving=True.
What does this PR do?
Issue tracking
For PRs from open-source community contributors:
Linked issue:
Contribution process
Pre-checks
jit_fuser/torch.compile, CUDA extension, TE or external-library dispatch, or a scatter/index accumulation), I have added or updated its bit-exact determinism test and registered it intests/unit_tests/determinism/kernels/manifest.py(guide)Code review
Feel free to message or comment @NVIDIA/mcore-oncall to help accelerate your merge into main. The less complex your PR is, the faster it will be approved and merged!
All PRs start as draft. If you open a non-draft PR, it will be automatically converted to draft.
Step 1: Mark PR as "Ready for Review"
.github/CODEOWNERS.Final Review might get declined if these requirements are not fulfilled.
Step 2: Final Review
For PRs that change
megatron/core, once all expert reviewers have approved, theFinal Reviewlabel is applied automatically and final reviewers are assigned.For PRs outside
megatron/core, this step is skipped.Step 3: Approved
Once all required reviewers have approved, the
Approvedlabel is applied automatically.Merge
Any member of mcore-engineers will be able to merge your PR.