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Fix MFSDP v2 shared-embedding gradient all-reduce under pipeline parallelism - #6500

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shjwudp:split/pr-embedding-grad-fix
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NVIDIA:mainfrom
shjwudp:split/pr-embedding-grad-fix

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@shjwudp shjwudp commented Aug 13, 2026

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Summary

MFSDP v2 shards embeddings with uneven (flat-buffer) offsets, and different PP stages can use different flattened layouts. Two ranks that own the same logical slice may hold it at different flat-buffer offsets with different local shard shapes, so reducing the raw local shards directly would combine mismatched elements.

Reconstruct the full logical embedding gradient via uneven_dtensor_to_full_tensor before the PP all-reduce, then copy back the slice this rank owns into its shard's local tensor.

Changes

  • finalize_model_grads.py: in _allreduce_embedding_grad, for use_megatron_fsdp, reconstruct the full logical embedding gradient before the all-reduce and copy back the local shard slice.

Notes

Split out of PR #6197; standalone (no dependency on the overlap PR).

…llelism

MFSDP v2 shards embeddings with uneven (flat-buffer) offsets, and different
PP stages can use different flattened layouts. Two ranks owning the same
logical slice may hold it at different flat-buffer offsets with different
local shard shapes, so reducing the raw local shards directly would combine
mismatched elements.

Reconstruct the full logical embedding gradient via
uneven_dtensor_to_full_tensor before the PP all-reduce, then copy back the
slice this rank owns into its shard's local tensor.

Signed-off-by: Jianbin Chang <jianbinc@nvidia.com>
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copy-pr-bot Bot commented Aug 13, 2026

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shjwudp added a commit to shjwudp/Megatron-LM that referenced this pull request Sep 11, 2026
…llelism

MFSDP v2 shards embeddings with uneven (flat-buffer) offsets, and different
PP stages can use different flattened layouts. Two ranks owning the same
logical slice may hold it at different flat-buffer offsets with different local
shard shapes, so reducing the raw local shards directly would combine mismatched
elements.

Reconstruct the full logical embedding gradient via uneven_dtensor_to_full_tensor
before the PP all-reduce, then copy back the slice this rank owns into its
shard's local tensor. Without this, MFSDP v2 + PP/VPP fails in
finalize_model_grads._allreduce_embedding_grad with
"attempting to assign a gradient of size '[N,1024]' to a tensor of size '[V,1024]'".

This is NVIDIA PR NVIDIA#6500's change (author: Jianbin Chang), ported so
shjwudp:split/pr-d-shared-context (PR NVIDIA#6486) actually runs MFSDP v2 + VPP.
Excluded the separate MFSDP-v2+MoE empty-shard TE workaround (PR NVIDIA#7002).

Validated on EOS H100 (deepseek_v3_proxy, real DeepSeek-V3 SlimPajama,
PP=2/VPP=2, seed 1234, 1000 iters): M-FSDP v2 and DistOpt converge to the
same val-loss (diff <= ~0.02, 0 NaN, exit 0).

Signed-off-by: Jianbin Chang <jianbinc@nvidia.com>
Signed-off-by: Jack Chang <jianbinc@nvidia.com>
shjwudp added a commit to shjwudp/Megatron-LM that referenced this pull request Sep 20, 2026
…llelism

MFSDP v2 shards embeddings with uneven (flat-buffer) offsets, and different
PP stages can use different flattened layouts. Two ranks owning the same
logical slice may hold it at different flat-buffer offsets with different local
shard shapes, so reducing the raw local shards directly would combine mismatched
elements.

Reconstruct the full logical embedding gradient via uneven_dtensor_to_full_tensor
before the PP all-reduce, then copy back the slice this rank owns into its
shard's local tensor. Without this, MFSDP v2 + PP/VPP fails in
finalize_model_grads._allreduce_embedding_grad with
"attempting to assign a gradient of size '[N,1024]' to a tensor of size '[V,1024]'".

This is NVIDIA PR NVIDIA#6500's change (author: Jianbin Chang), ported so
shjwudp:split/pr-d-shared-context (PR NVIDIA#6486) actually runs MFSDP v2 + VPP.
Excluded the separate MFSDP-v2+MoE empty-shard TE workaround (PR NVIDIA#7002).

Validated on EOS H100 (deepseek_v3_proxy, real DeepSeek-V3 SlimPajama,
PP=2/VPP=2, seed 1234, 1000 iters): M-FSDP v2 and DistOpt converge to the
same val-loss (diff <= ~0.02, 0 NaN, exit 0).

Signed-off-by: Jianbin Chang <jianbinc@nvidia.com>
Signed-off-by: Jack Chang <jianbinc@nvidia.com>
@shjwudp shjwudp closed this Sep 21, 2026
copy-pr-bot Bot pushed a commit that referenced this pull request Sep 22, 2026
…llelism

MFSDP v2 shards embeddings with uneven (flat-buffer) offsets, and different
PP stages can use different flattened layouts. Two ranks owning the same
logical slice may hold it at different flat-buffer offsets with different local
shard shapes, so reducing the raw local shards directly would combine mismatched
elements.

Reconstruct the full logical embedding gradient via uneven_dtensor_to_full_tensor
before the PP all-reduce, then copy back the slice this rank owns into its
shard's local tensor. Without this, MFSDP v2 + PP/VPP fails in
finalize_model_grads._allreduce_embedding_grad with
"attempting to assign a gradient of size '[N,1024]' to a tensor of size '[V,1024]'".

This is NVIDIA PR #6500's change (author: Jianbin Chang), ported so
shjwudp:split/pr-d-shared-context (PR #6486) actually runs MFSDP v2 + VPP.
Excluded the separate MFSDP-v2+MoE empty-shard TE workaround (PR #7002).

Validated on EOS H100 (deepseek_v3_proxy, real DeepSeek-V3 SlimPajama,
PP=2/VPP=2, seed 1234, 1000 iters): M-FSDP v2 and DistOpt converge to the
same val-loss (diff <= ~0.02, 0 NaN, exit 0).

Signed-off-by: Jianbin Chang <jianbinc@nvidia.com>
Signed-off-by: Jack Chang <jianbinc@nvidia.com>
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