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45 changes: 45 additions & 0 deletions crates/synth-backend/src/arm_backend.rs
Original file line number Diff line number Diff line change
Expand Up @@ -247,6 +247,51 @@ fn compile_wasm_to_arm(
// needs an on-target/allocator-aware gate, not a byte-count gate, before it
// can default on.

// VCR-RA-001 SHADOW ALLOCATION (#209/#242): run the register allocator on
// the selected stream and LOG what it finds — without changing a single
// emitted byte. This is the measure-only bridge between the built analysis
// layer and the eventual virtual-register wiring: it shows, per real
// function, whether the allocator can colour it within the R0–R8 pool and
// how much const-CSE / rematerialization headroom exists (#209). Enable with
// `SYNTH_SHADOW_ALLOC=1`; off by default and side-effect-free either way.
if std::env::var("SYNTH_SHADOW_ALLOC").is_ok() {
use synth_synthesis::liveness::{
AllocationOutcome, allocate_function, function_peak_pressure,
};
// R9 globals / R10 mem-size / R11 mem-base / R12 IP-scratch are reserved;
// pin them above the 0..9 allocatable pool so the colourer keeps R0–R8.
let precolored = std::collections::BTreeMap::from([
(synth_synthesis::rules::Reg::R9, 9usize),
(synth_synthesis::rules::Reg::R10, 10),
(synth_synthesis::rules::Reg::R11, 11),
(synth_synthesis::rules::Reg::R12, 12),
]);
// True VALUE pressure (one node per value, not per reused physical reg):
// a NeedsSpill with peak ≤ 9 is a SPURIOUS physical-register spill — the
// function fits once virtually allocated.
let peak = function_peak_pressure(&arm_instrs);
match allocate_function(&arm_instrs, 9, &precolored) {
AllocationOutcome::Allocated {
remat_opportunities,
coloring,
} => eprintln!(
"[shadow-alloc] OK: {} pregs coloured within R0-R8 pool, peak value-pressure {}, {} const-CSE/remat opportunities",
coloring.len(),
peak,
remat_opportunities
),
AllocationOutcome::NeedsSpill(s) => eprintln!(
"[shadow-alloc] physical-graph would spill {:?}, but peak value-pressure is {} (≤9 ⇒ spurious; fits once virtually allocated)",
s, peak
),
AllocationOutcome::Declined => {
eprintln!(
"[shadow-alloc] declined (unmodeled construct — calls/i64/fp/offset-branch)"
)
}
}
}

// ISA feature gate: validate that all generated instructions are supported
// by the target. This catches FPU instructions on no-FPU targets, double-precision
// instructions on single-precision targets, etc.
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