sega model 1: segam1audio clock duplication intentional?

[FlykeSpice]

I'm asking this because it's not clear for me from CPU pcb UART clock_device configuration:

https://github.com/mamedev/mame/blob/4873b416e7ed574e1823110b8b4ee6a6f8e0afc5/src/mame/sega/model1.cpp#L1857

	I8251(config, m_m1uart, 8000000); // uPD71051C, clock unknown
	m_m1uart->txd_handler().set(m_m1audio, FUNC(segam1audio_device::write_txd));
	m_m1uart->rxrdy_handler().set(FUNC(model1_state::sound_ready_w));
	m_m1uart->txrdy_handler().set(FUNC(model1_state::sound_ready_w));

	clock_device &m1uart_clock(CLOCK(config, "m1uart_clock", 16_MHz_XTAL / 2 / 16)); // 16 times 31.25kHz (standard Sega/MIDI sound data rate)
	m1uart_clock.signal_handler().set(m_m1uart, FUNC(i8251_device::write_txc));
	m1uart_clock.signal_handler().append(m_m1uart, FUNC(i8251_device::write_rxc));

yet segam1audio device already configures its own clock device:
https://github.com/mamedev/mame/blob/02daf2c20c50ddc0ca70d87acb3b94524e99e9b9/src/mame/shared/segam1audio.cpp#L74-L80

	I8251(config, m_uart, 16_MHz_XTAL / 2); // T82C51
	m_uart->rxrdy_handler().set_inputline(m_audiocpu, M68K_IRQ_2);
	m_uart->txd_handler().set(FUNC(segam1audio_device::output_txd));

	clock_device &uart_clock(CLOCK(config, "uart_clock", 16_MHz_XTAL / 2 / 16)); // 16 times 31.25kHz (standard Sega/MIDI sound data rate)
	uart_clock.signal_handler().set(m_uart, FUNC(i8251_device::write_txc));
	uart_clock.signal_handler().append(m_uart, FUNC(i8251_device::write_rxc));

The answer might seem obvious because from looking at the PCB layouts in model1.cpp, cpu board has its own uart (D71051) separate from sega m1 audio (T82C51), but I don't see any 16mhz xtal there, so I don't know where D71051 is sourcing the clock from...