artemis: Add ni-7AAE.dts device tree to support artemis

Add the device tree with the device code of 7AAE to support the
artemis project. This device tree is adapted from the athena project
(76F2), with the removal of nandrive and the addition of sd card
support.

Signed-off-by: wkoe <wilson.koe@ni.com>
Acked-by: Gratian Crisan <gratian.crisan@ni.com>

Author: NIwkoe

arch/arm/boot/dts/Makefile

@@ -1029,7 +1029,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
 	ni-77D5.dtb \
 	ni-77D6.dtb \
 	ni-7885.dtb \
-	ni-793C.dtb
+	ni-793C.dtb \
+	ni-7AAE.dtb
 dtb-$(CONFIG_MACH_ARMADA_370) += \
 	armada-370-db.dtb \
 	armada-370-dlink-dns327l.dtb \

arch/arm/boot/dts/ni-7AAE.dts

@@ -0,0 +1,205 @@
+/dts-v1/;
+/include/ "ni-zynq.dtsi"
+
+/ {
+	model = "NI roboRIO 2.0";
+	compatible = "ni,zynq", "xlnx,zynq-7000";
+
+	aliases {
+		spi0 = &spi0;
+		spi1 = &spi1;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		wlan1 {
+			/* green */
+			label = "nilrt:wifi:primary";
+			gpios = <&gpio 55 0>;
+		};
+
+		wlan2 {
+			/* red */
+			label = "nilrt:wifi:secondary";
+			gpios = <&gpio 56 0>;
+		};
+	};
+
+	amba@0 {
+		adc: adc@f8007100 {
+			xlnx,channels {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				/* Channel 0 maps to VPVN */
+				channel@0 {
+					reg = <0>;
+				};
+				/* Channel 1 maps to VAUX0 */
+				channel@1 {
+					reg = <1>;
+				};
+				/* Channel 2 maps to VAUX1 */
+				channel@2 {
+					reg = <2>;
+				};
+				/* Channel 3 maps to VAUX2 */
+				channel@3 {
+					reg = <3>;
+				};
+				/* Channel 4 maps to VAUX3 */
+				channel@4 {
+					reg = <4>;
+				};
+				/* Channel 5 maps to VAUX4 */
+				channel@5 {
+					reg = <5>;
+				};
+				/* Channel 9 maps to VAUX8 */
+				channel@9 {
+					reg = <9>;
+				};
+				/* Channel 10 maps to VAUX9 */
+				channel@10 {
+					reg = <10>;
+				};
+				/* Channel 11 maps to VAUX10 */
+				channel@11 {
+					reg = <11>;
+				};
+				/* Channel 12 maps to VAUX11 */
+				channel@12 {
+					reg = <12>;
+				};
+			};
+		};
+
+		smcc@e000e000 {
+			nand@e1000000 {
+				status = "disabled";
+			};
+		};
+
+		i2c0: i2c@e0004000 {
+			nicpld@40 {
+				watchdogs {
+					boot-watchdog {
+						interrupt-parent = <&gpio>;
+						interrupts = <24 2 /* IRQ_TYPE_EDGE_FALLING */>;
+					};
+				};
+
+				leds {
+					status-1 {
+						label = "nilrt:status:yellow";
+						max-brightness = <0xFFFF>;
+					};
+				};
+			};
+		};
+
+		i2c1: i2c@e0005000 {
+			status = "okay";
+		};
+
+		i2c2: i2c@81000000 {
+			status = "okay";
+		};
+
+		spi0: spi@e0006000 {
+			status = "okay";
+			num-cs = <7>;
+			is-decoded-cs = <1>;
+			speed-hz = <200000000>;
+
+			spidev@0 {
+				compatible = "spidev";
+				spi-max-frequency = <2000000>;
+				reg = <0>;
+			};
+			spidev@1 {
+				compatible = "spidev";
+				spi-max-frequency = <2000000>;
+				reg = <1>;
+			};
+			spidev@2 {
+				compatible = "spidev";
+				spi-max-frequency = <2000000>;
+				reg = <2>;
+			};
+			spidev@3 {
+				compatible = "spidev";
+				spi-max-frequency = <2000000>;
+				reg = <3>;
+			};
+		};
+
+		spi1: spi@e0007000 {
+			status = "okay";
+			num-cs = <3>;
+			is-decoded-cs = <0>;
+			speed-hz = <200000000>;
+
+			spidev@0 {
+				compatible = "spidev";
+				spi-max-frequency = <2000000>;
+				reg = <0>;
+			};
+		};
+	};
+};
+
+&gem0 {
+	status = "okay";
+	phy-handle = <&phy0>;
+	phy-mode = "rgmii-id";
+	emio-speed-gpios = <&gpio 54 0>,
+			   <0>;
+	#address-cells = <0x1>;
+	#size-cells = <0x0>;
+
+	phy0: phy@0 {
+		compatible = "smsc,lan8720","ethernet-phy-ieee802.3-c22";
+		device_type = "ethernet-phy";
+		reg = <0x0>;
+		/* Interrupt pin is connected from PL pin to FPGA IRQ 3 */
+		interrupts = <0 32 4>;
+		smsc,disable-energy-detect;
+	};
+};
+
+&sdhci1 {
+	status = "okay";
+};
+
+&ni_uart0 {
+	status = "okay";
+	transceiver = "RS-232";
+};
+
+&ni_uart1 {
+	status = "okay";
+	transceiver = "RS-232";
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&can0 {
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+	dr_mode = "host";
+};
+
+&usb1 {
+	status = "okay";
+	dr_mode = "peripheral";
+};
+
+&clkc {
+	/* Enable fclk1 for serial. */
+	fclk-enable = <0x2>;
+};