|
22 | 22 | enable-method = "psci"; |
23 | 23 | reg = <0x0 0x0>; |
24 | 24 | device_type = "cpu"; |
| 25 | + power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>; |
| 26 | + power-domain-names = "perf"; |
25 | 27 | capacity-dmips-mhz = <403>; |
| 28 | + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; |
26 | 29 | }; |
27 | 30 |
|
28 | 31 | cpu1: cpu@100 { |
29 | 32 | compatible = "arm,cortex-a520"; |
30 | 33 | enable-method = "psci"; |
31 | 34 | reg = <0x0 0x100>; |
32 | 35 | device_type = "cpu"; |
| 36 | + power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>; |
| 37 | + power-domain-names = "perf"; |
33 | 38 | capacity-dmips-mhz = <403>; |
| 39 | + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; |
34 | 40 | }; |
35 | 41 |
|
36 | 42 | cpu2: cpu@200 { |
37 | 43 | compatible = "arm,cortex-a520"; |
38 | 44 | enable-method = "psci"; |
39 | 45 | reg = <0x0 0x200>; |
40 | 46 | device_type = "cpu"; |
| 47 | + power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>; |
| 48 | + power-domain-names = "perf"; |
41 | 49 | capacity-dmips-mhz = <403>; |
| 50 | + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; |
42 | 51 | }; |
43 | 52 |
|
44 | 53 | cpu3: cpu@300 { |
45 | 54 | compatible = "arm,cortex-a520"; |
46 | 55 | enable-method = "psci"; |
47 | 56 | reg = <0x0 0x300>; |
48 | 57 | device_type = "cpu"; |
| 58 | + power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>; |
| 59 | + power-domain-names = "perf"; |
49 | 60 | capacity-dmips-mhz = <403>; |
| 61 | + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; |
50 | 62 | }; |
51 | 63 |
|
52 | 64 | cpu4: cpu@400 { |
53 | 65 | compatible = "arm,cortex-a720"; |
54 | 66 | enable-method = "psci"; |
55 | 67 | reg = <0x0 0x400>; |
56 | 68 | device_type = "cpu"; |
| 69 | + power-domains = <&scmi_dvfs SKY1_PERF_CPU_M0>; |
| 70 | + power-domain-names = "perf"; |
57 | 71 | capacity-dmips-mhz = <1024>; |
| 72 | + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>; |
58 | 73 | }; |
59 | 74 |
|
60 | 75 | cpu5: cpu@500 { |
61 | 76 | compatible = "arm,cortex-a720"; |
62 | 77 | enable-method = "psci"; |
63 | 78 | reg = <0x0 0x500>; |
64 | 79 | device_type = "cpu"; |
| 80 | + power-domains = <&scmi_dvfs SKY1_PERF_CPU_M0>; |
| 81 | + power-domain-names = "perf"; |
65 | 82 | capacity-dmips-mhz = <1024>; |
| 83 | + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>; |
66 | 84 | }; |
67 | 85 |
|
68 | 86 | cpu6: cpu@600 { |
69 | 87 | compatible = "arm,cortex-a720"; |
70 | 88 | enable-method = "psci"; |
71 | 89 | reg = <0x0 0x600>; |
72 | 90 | device_type = "cpu"; |
| 91 | + power-domains = <&scmi_dvfs SKY1_PERF_CPU_M1>; |
| 92 | + power-domain-names = "perf"; |
73 | 93 | capacity-dmips-mhz = <1024>; |
| 94 | + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>; |
74 | 95 | }; |
75 | 96 |
|
76 | 97 | cpu7: cpu@700 { |
77 | 98 | compatible = "arm,cortex-a720"; |
78 | 99 | enable-method = "psci"; |
79 | 100 | reg = <0x0 0x700>; |
80 | 101 | device_type = "cpu"; |
| 102 | + power-domains = <&scmi_dvfs SKY1_PERF_CPU_M1>; |
| 103 | + power-domain-names = "perf"; |
81 | 104 | capacity-dmips-mhz = <1024>; |
| 105 | + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>; |
82 | 106 | }; |
83 | 107 |
|
84 | 108 | cpu8: cpu@800 { |
85 | 109 | compatible = "arm,cortex-a720"; |
86 | 110 | enable-method = "psci"; |
87 | 111 | reg = <0x0 0x800>; |
88 | 112 | device_type = "cpu"; |
| 113 | + power-domains = <&scmi_dvfs SKY1_PERF_CPU_B0>; |
| 114 | + power-domain-names = "perf"; |
89 | 115 | capacity-dmips-mhz = <1024>; |
| 116 | + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>; |
90 | 117 | }; |
91 | 118 |
|
92 | 119 | cpu9: cpu@900 { |
93 | 120 | compatible = "arm,cortex-a720"; |
94 | 121 | enable-method = "psci"; |
95 | 122 | reg = <0x0 0x900>; |
96 | 123 | device_type = "cpu"; |
| 124 | + power-domains = <&scmi_dvfs SKY1_PERF_CPU_B0>; |
| 125 | + power-domain-names = "perf"; |
97 | 126 | capacity-dmips-mhz = <1024>; |
| 127 | + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>; |
98 | 128 | }; |
99 | 129 |
|
100 | 130 | cpu10: cpu@a00 { |
101 | 131 | compatible = "arm,cortex-a720"; |
102 | 132 | enable-method = "psci"; |
103 | 133 | reg = <0x0 0xa00>; |
104 | 134 | device_type = "cpu"; |
| 135 | + power-domains = <&scmi_dvfs SKY1_PERF_CPU_B1>; |
| 136 | + power-domain-names = "perf"; |
105 | 137 | capacity-dmips-mhz = <1024>; |
| 138 | + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>; |
106 | 139 | }; |
107 | 140 |
|
108 | 141 | cpu11: cpu@b00 { |
109 | 142 | compatible = "arm,cortex-a720"; |
110 | 143 | enable-method = "psci"; |
111 | 144 | reg = <0x0 0xb00>; |
112 | 145 | device_type = "cpu"; |
| 146 | + power-domains = <&scmi_dvfs SKY1_PERF_CPU_B1>; |
| 147 | + power-domain-names = "perf"; |
113 | 148 | capacity-dmips-mhz = <1024>; |
| 149 | + cpu-idle-states = <&CPU_SLEEP_1 &CLUSTER_SLEEP_0>; |
114 | 150 | }; |
115 | 151 |
|
116 | 152 | cpu-map { |
|
153 | 189 | }; |
154 | 190 | }; |
155 | 191 | }; |
| 192 | + |
| 193 | + idle-states { |
| 194 | + CPU_SLEEP_0: cpu-sleep-0 { |
| 195 | + compatible = "arm,idle-state"; |
| 196 | + arm,psci-suspend-param = <0x0010000>; |
| 197 | + local-timer-stop; |
| 198 | + entry-latency-us = <34>; |
| 199 | + exit-latency-us = <100>; |
| 200 | + min-residency-us = <3000>; |
| 201 | + }; |
| 202 | + |
| 203 | + CPU_SLEEP_1: cpu-sleep-1 { |
| 204 | + compatible = "arm,idle-state"; |
| 205 | + arm,psci-suspend-param = <0x0010000>; |
| 206 | + local-timer-stop; |
| 207 | + entry-latency-us = <31>; |
| 208 | + exit-latency-us = <79>; |
| 209 | + min-residency-us = <3000>; |
| 210 | + }; |
| 211 | + |
| 212 | + CLUSTER_SLEEP_0: cluster-sleep-0 { |
| 213 | + compatible = "arm,idle-state"; |
| 214 | + arm,psci-suspend-param = <0x1010000>; |
| 215 | + local-timer-stop; |
| 216 | + entry-latency-us = <41>; |
| 217 | + exit-latency-us = <104>; |
| 218 | + min-residency-us = <4000>; |
| 219 | + }; |
| 220 | + }; |
156 | 221 | }; |
157 | 222 |
|
158 | 223 | firmware { |
|
164 | 229 | #address-cells = <1>; |
165 | 230 | #size-cells = <0>; |
166 | 231 |
|
| 232 | + scmi_dvfs: protocol@13 { |
| 233 | + reg = <0x13>; |
| 234 | + #power-domain-cells = <1>; |
| 235 | + }; |
| 236 | + |
167 | 237 | scmi_clk: protocol@14 { |
168 | 238 | reg = <0x14>; |
169 | 239 | #clock-cells = <1>; |
|
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