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linuswlinusw
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Merge tag 'v7.2-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New peripherals: Watchdog on RK3528, MIPI CSI-2 receiver on RK3588. Adding frl-enable-gpios to a number of boards for HDMI 2.0 support. And a bunch of fixes and new peripherals for a number of boards. * tag 'v7.2-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (30 commits) arm64: dts: rockchip: Add watchdog node for RK3528 arm64: dts: rockchip: add mipi csi-2 receiver nodes to rk3588 arm64: dts: rockchip: fix rk809 interrupt pin on rk3566-roc-pc arm64: dts: rockchip: Add missing pinctrl-names to rk3588s boards arm64: dts: rockchip: Add missing pinctrl-names to rk3588 boards arm64: dts: rockchip: Add missing pinctrl-names to rk3576 boards arm64: dts: rockchip: Drop unnecessary #{address,size}-cells from rk3588-jaguar arm64: dts: rockchip: Add frl-enable-gpios to rk3588s-roc-pc arm64: dts: rockchip: Add frl-enable-gpios to rk3588s-orangepi-cm5-base arm64: dts: rockchip: Add frl-enable-gpios to rk3588s-khadas-edge2 arm64: dts: rockchip: Add frl-enable-gpios to rk3588s-gameforce-ace arm64: dts: rockchip: Add frl-enable-gpios to rk3588s boards arm64: dts: rockchip: Add frl-enable-gpios to rk3588 boards arm64: dts: rockchip: Add frl-enable-gpios to rk3576-nanopi-r76s arm64: dts: rockchip: Add frl-enable-gpios to rk3576-luckfox-core3576 arm64: dts: rockchip: Add frl-enable-gpios to rk3576 boards arm64: dts: rockchip: Add AP6275P wireless support for Khadas Edge 2L arm64: dts: rockchip: Add HYM8563 RTC for Khadas Edge 2L arm64: dts: rockchip: Add #{address,size}-cells to Chromium-based /firmware arm64: dts: rockchip: Add HDMI and VOP support for Khadas Edge 2L ... Signed-off-by: Linus Walleij <linusw@kernel.org>
2 parents 7832572 + eb24b60 commit 513edb1

62 files changed

Lines changed: 1190 additions & 89 deletions

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‎MAINTAINERS‎

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Original file line numberDiff line numberDiff line change
@@ -3425,6 +3425,8 @@ F: drivers/i2c/busses/i2c-rk3x.c
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F: drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
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F: sound/soc/rockchip/
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N: rockchip
3428+
K: \b[Rr]ock[Cc]hip\b
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K: (?:\b|_)ROCKCHIP(?:\b|_)
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34293431
ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES
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M: Krzysztof Kozlowski <krzk@kernel.org>

‎arch/arm64/boot/dts/rockchip/px30-cobra.dtsi‎

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@@ -397,7 +397,7 @@
397397

398398
&mdio {
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dp83825: ethernet-phy@0 {
400-
compatible = "ethernet-phy-ieee802.3-c22";
400+
compatible = "ethernet-phy-id2000.a140";
401401
reg = <0x0>;
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pinctrl-names = "default";
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pinctrl-0 = <&phy_rst>;

‎arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi‎

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@@ -344,7 +344,7 @@
344344

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&mdio {
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dp83825: ethernet-phy@0 {
347-
compatible = "ethernet-phy-ieee802.3-c22";
347+
compatible = "ethernet-phy-id2000.a140";
348348
reg = <0x0>;
349349
pinctrl-names = "default";
350350
pinctrl-0 = <&phy_rst>;

‎arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi‎

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@@ -18,6 +18,11 @@
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stdout-path = "serial2:115200n8";
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};
2020

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firmware {
22+
#address-cells = <2>;
23+
#size-cells = <2>;
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};
25+
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/*
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* Power Tree
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*

‎arch/arm64/boot/dts/rockchip/rk3528.dtsi‎

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@@ -983,6 +983,14 @@
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status = "disabled";
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};
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986+
wdt: watchdog@ffac0000 {
987+
compatible = "rockchip,rk3528-wdt", "snps,dw-wdt";
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reg = <0x0 0xffac0000 0x0 0x100>;
989+
clocks = <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>;
990+
clock-names = "tclk", "pclk";
991+
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
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};
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saradc: adc@ffae0000 {
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compatible = "rockchip,rk3528-saradc";
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reg = <0x0 0xffae0000 0x0 0x10000>;

‎arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts‎

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@@ -245,7 +245,7 @@
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compatible = "rockchip,rk809";
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reg = <0x20>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
248+
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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clock-output-names = "rk808-clkout1", "rk808-clkout2";
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assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
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assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;

‎arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts‎

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@@ -98,7 +98,7 @@
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rgmii_phy0: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
101-
pinctrl-0 = <&eth_phy0_reset_pin>;
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pinctrl-0 = <&gmac0_rstn_gpio0_c5_pin>;
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pinctrl-names = "default";
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};
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};
@@ -132,8 +132,8 @@
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133133
&pinctrl {
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gmac0 {
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eth_phy0_reset_pin: eth-phy0-reset-pin {
136-
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
135+
gmac0_rstn_gpio0_c5_pin: gmac0-rstn-gpio0-c5-pin {
136+
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
137137
};
138138
};
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‎arch/arm64/boot/dts/rockchip/rk3568-rock-3b.dts‎

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@@ -56,16 +56,22 @@
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};
5757
};
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59-
/* pi6c pcie clock generator */
59+
/* PI6C20100 PCIe reference clock buffer */
60+
pcie30_refclk: pcie-clock-generator {
61+
compatible = "gated-fixed-clock";
62+
#clock-cells = <0>;
63+
clock-frequency = <100000000>;
64+
clock-output-names = "pcie30_refclk";
65+
vdd-supply = <&vcc3v3_pi6c_03>;
66+
};
67+
6068
vcc3v3_pi6c_03: regulator-3v3-vcc-pi6c-03 {
6169
compatible = "regulator-fixed";
6270
enable-active-high;
6371
gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
6573
pinctrl-0 = <&pcie_pwren_h>;
6674
regulator-name = "vcc3v3_pi6c_03";
67-
regulator-always-on;
68-
regulator-boot-on;
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regulator-min-microvolt = <3300000>;
7076
regulator-max-microvolt = <3300000>;
7177
startup-delay-us = <10000>;
@@ -553,6 +559,14 @@
553559
};
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555561
&pcie3x2 {
562+
clocks = <&cru ACLK_PCIE30X2_MST>, <&cru ACLK_PCIE30X2_SLV>,
563+
<&cru ACLK_PCIE30X2_DBI>, <&cru PCLK_PCIE30X2>,
564+
<&cru CLK_PCIE30X2_AUX_NDFT>,
565+
<&cru CLK_PCIE30X2_PIPE_DFT>,
566+
<&pcie30_refclk>;
567+
clock-names = "aclk_mst", "aclk_slv",
568+
"aclk_dbi", "pclk", "aux",
569+
"pipe", "ref";
556570
pinctrl-names = "default";
557571
pinctrl-0 = <&pcie30x2m1_pins>;
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reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;

‎arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts‎

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@@ -278,6 +278,9 @@
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};
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280280
&hdmi {
281+
frl-enable-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
282+
pinctrl-0 = <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>;
283+
pinctrl-names = "default";
281284
status = "okay";
282285
};
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@@ -738,6 +741,12 @@
738741
};
739742
};
740743

744+
hdmi {
745+
hdmi_tx_on_h: hdmi-tx-on-h {
746+
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
747+
};
748+
};
749+
741750
pcie {
742751
pcie_reset: pcie-reset {
743752
rockchip,pins = <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -806,6 +815,7 @@
806815

807816
&uart0 {
808817
pinctrl-0 = <&uart0m0_xfer>;
818+
pinctrl-names = "default";
809819
status = "okay";
810820
};
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‎arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts‎

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@@ -304,6 +304,9 @@
304304
};
305305

306306
&hdmi {
307+
frl-enable-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
308+
pinctrl-0 = <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>;
309+
pinctrl-names = "default";
307310
status = "okay";
308311
};
309312

@@ -819,6 +822,12 @@
819822
};
820823
};
821824

825+
hdmi {
826+
hdmi_tx_on_h: hdmi-tx-on-h {
827+
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
828+
};
829+
};
830+
822831
hym8563 {
823832
hym8563_int: hym8563-int {
824833
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -966,6 +975,7 @@
966975

967976
&uart0 {
968977
pinctrl-0 = <&uart0m0_xfer>;
978+
pinctrl-names = "default";
969979
status = "okay";
970980
};
971981

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