From 2267af5a62603f3ca3e05d6a42e792ba266fe3ca Mon Sep 17 00:00:00 2001 From: Jakob Botsch Nielsen Date: Wed, 20 Jul 2022 13:06:36 +0200 Subject: [PATCH] JIT: Move cpblk GC ref layout check back to lowering The check in codegen runs only for arm64 but this check needs to happen for arm32 as well. This moves the GC ref layout check back to lowering and aligns it with xarch as well. Fix #69976 --- src/coreclr/jit/codegenarmarch.cpp | 3 +-- src/coreclr/jit/lowerarmarch.cpp | 7 ++++++- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/src/coreclr/jit/codegenarmarch.cpp b/src/coreclr/jit/codegenarmarch.cpp index 789170957b12fe..69c85482637811 100644 --- a/src/coreclr/jit/codegenarmarch.cpp +++ b/src/coreclr/jit/codegenarmarch.cpp @@ -2858,8 +2858,7 @@ void CodeGen::genCodeForCpBlkUnroll(GenTreeBlk* node) } #endif - if (!node->gtBlkOpGcUnsafe && - ((srcOffsetAdjustment != 0) || (dstOffsetAdjustment != 0) || (node->GetLayout()->HasGCPtr()))) + if (!node->gtBlkOpGcUnsafe && ((srcOffsetAdjustment != 0) || (dstOffsetAdjustment != 0))) { // If node is not already marked as non-interruptible, and if are about to generate code // that produce GC references in temporary registers not reported, then mark the block diff --git a/src/coreclr/jit/lowerarmarch.cpp b/src/coreclr/jit/lowerarmarch.cpp index 659a330e8bc6d2..1e2420b37a953b 100644 --- a/src/coreclr/jit/lowerarmarch.cpp +++ b/src/coreclr/jit/lowerarmarch.cpp @@ -493,10 +493,15 @@ void Lowering::LowerBlockStore(GenTreeBlk* blkNode) if (blkNode->OperIs(GT_STORE_OBJ)) { - if (!blkNode->AsObj()->GetLayout()->HasGCPtr() || (isDstAddrLocal && (size <= copyBlockUnrollLimit))) + if (!blkNode->AsObj()->GetLayout()->HasGCPtr()) { blkNode->SetOper(GT_STORE_BLK); } + else if (isDstAddrLocal && (size <= copyBlockUnrollLimit)) + { + blkNode->SetOper(GT_STORE_BLK); + blkNode->gtBlkOpGcUnsafe = true; + } } if (blkNode->OperIs(GT_STORE_OBJ))