i64x2.abs instruction

Author: Maratyszcza

proposals/simd/BinarySIMD.md

@@ -179,6 +179,7 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
 | `i32x4.max_s`                  |    `0xb8`| -                        |
 | `i32x4.max_u`                  |    `0xb9`| -                        |
 | `i32x4.dot_i16x8_s`            |    `0xba`| -                        |
+| `i64x2.abs`                    |    `0xc0`| -                        |
 | `i64x2.neg`                    |    `0xc1`| -                        |
 | `i64x2.bitmask`                |    `0xc4`| -                        |
 | `i64x2.widen_low_i32x4_s`      |    `0xc7`| -                        |

proposals/simd/ImplementationStatus.md

@@ -149,6 +149,7 @@
 | `i32x4.max_u`                  |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `i32x4.dot_i16x8_s`            |                           | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `i64x2.eq`                     |                           |                    |                    |                    |                    |
+| `i64x2.abs`                    |                           |                    |                    |                    |                    |
 | `i64x2.neg`                    |               `-msimd128` | :heavy_check_mark: |                    | :heavy_check_mark: | :heavy_check_mark: |
 | `i64x2.all_true`               |                           |                    |                    |                    |                    |
 | `i64x2.bitmask`                |                           | :heavy_check_mark: |                    |                    |                    |

proposals/simd/NewOpcodes.md

@@ -80,7 +80,7 @@
 
 | i8x16 Op             | opcode | i16x8 Op                 | opcode | i32x4 Op                 | opcode | i64x2 Op                 | opcode |
 | -------------------- | ------ | ------------------------ | ------ | ------------------------ | ------ | ------------------------ | ------ |
-| i8x16.abs            | 0x60   | i16x8.abs                | 0x80   | i32x4.abs                | 0xa0   | -------------            | 0xc0   |
+| i8x16.abs            | 0x60   | i16x8.abs                | 0x80   | i32x4.abs                | 0xa0   | i64x2.abs                | 0xc0   |
 | i8x16.neg            | 0x61   | i16x8.neg                | 0x81   | i32x4.neg                | 0xa1   | i64x2.neg                | 0xc1   |
 | -------------        | 0x62   | -------------            | 0x82   | -------------            | 0xa2   | -------------            | 0xc2   |
 | i8x16.all_true       | 0x63   | i16x8.all_true           | 0x83   | i32x4.all_true           | 0xa3   | (i64x2.all_true) [TBD]   | 0xc3   |

proposals/simd/SIMD.md

@@ -572,6 +572,7 @@ def S.avgr_u(a, b):
 * `i8x16.abs(a: v128) -> v128`
 * `i16x8.abs(a: v128) -> v128`
 * `i32x4.abs(a: v128) -> v128`
+* `i64x2.abs(a: v128) -> v128`
 
 Lane-wise wrapping absolute value.