diff --git a/neon_intrinsics/advsimd.rst b/neon_intrinsics/advsimd.rst
index acab792f..60110baf 100644
--- a/neon_intrinsics/advsimd.rst
+++ b/neon_intrinsics/advsimd.rst
@@ -1,6 +1,6 @@
 .. |copyright-date| replace:: 2014-2021
-.. |release| replace:: 2021Q2
-.. |date-of-issue| replace:: 02 July 2021
+.. |release| replace:: development version based on 2021Q2
+.. |date-of-issue| replace:: TBD
 .. |footer| replace:: Copyright © |copyright-date|, Arm Limited and its
                       affiliates. All rights reserved.
 
@@ -141,12 +141,16 @@ Document history
 +------------+-------------------------+-------------------------+
 |F           |30 May 2020              |Version ACLE Q2 2020     |
 +------------+-------------------------+-------------------------+
-|G           |30 October 2020          |Version ACLE Q2 2020     |
+|G           |30 October 2020          |Version ACLE Q3 2020     |
 +------------+-------------------------+-------------------------+
-|H           | |date-of-issue|         | |release|               |
+|H           |02 July 2021             |              2021Q2     |
 +------------+-------------------------+-------------------------+
 
 
+Changes between next release and 2021Q2
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+* Fixed the guard macro for the base intrinsics.
+
 List of Intrinsics
 ##################
 
@@ -155,7 +159,7 @@ List of Intrinsics
 Basic intrinsics
 ================
 
-The intrinsics in this section are guarded by the macro ``__ARM_FEATURE_SVE``.
+The intrinsics in this section are guarded by the macro ``__ARM_NEON``.
 
 Vector arithmetic
 ~~~~~~~~~~~~~~~~~
@@ -27488,4 +27492,3 @@ Vector multiply-accumulate by scalar
 |         bfloat16x8_t b,              |     0 <= lane <= 7     |                                    |                     |                           |
 |         const int lane)              |                        |                                    |                     |                           |
 +--------------------------------------+------------------------+------------------------------------+---------------------+---------------------------+
-
diff --git a/neon_intrinsics/advsimd.template.rst b/neon_intrinsics/advsimd.template.rst
index 8ebf3fce..3d098d98 100644
--- a/neon_intrinsics/advsimd.template.rst
+++ b/neon_intrinsics/advsimd.template.rst
@@ -1,6 +1,6 @@
 .. |copyright-date| replace:: 2014-2021
-.. |release| replace:: 2021Q2
-.. |date-of-issue| replace:: 02 July 2021
+.. |release| replace:: development version based on 2021Q2
+.. |date-of-issue| replace:: TBD
 .. |footer| replace:: Copyright © |copyright-date|, Arm Limited and its
                       affiliates. All rights reserved.
 
@@ -141,14 +141,17 @@ Document history
 +------------+-------------------------+-------------------------+
 |F           |30 May 2020              |Version ACLE Q2 2020     |
 +------------+-------------------------+-------------------------+
-|G           |30 October 2020          |Version ACLE Q2 2020     |
+|G           |30 October 2020          |Version ACLE Q3 2020     |
 +------------+-------------------------+-------------------------+
-|H           | |date-of-issue|         | |release|               |
+|H           |02 July 2021             |              2021Q2     |
 +------------+-------------------------+-------------------------+
 
 
+Changes between next release and 2021Q2
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+* Fixed the guard macro for the base intrinsics.
+
 List of Intrinsics
 ##################
 
 {intrinsic_table}
-
diff --git a/tools/intrinsic_db/advsimd.csv b/tools/intrinsic_db/advsimd.csv
index efb1b9d8..c23bd948 100644
--- a/tools/intrinsic_db/advsimd.csv
+++ b/tools/intrinsic_db/advsimd.csv
@@ -13,7 +13,7 @@
 <COMMENT>	See the License for the specific language governing permissions and
 <COMMENT>	limitations under the License.
 <HEADER>	Intrinsic	Argument preparation	AArch64 Instruction	Result	Supported architectures
-<SECTION>	Basic intrinsics	The intrinsics in this section are guarded by the macro ``__ARM_FEATURE_SVE``.
+<SECTION>	Basic intrinsics	The intrinsics in this section are guarded by the macro ``__ARM_NEON``.
 int8x8_t vadd_s8(int8x8_t a, int8x8_t b)	a -> Vn.8B;b -> Vm.8B	ADD Vd.8B,Vn.8B,Vm.8B	Vd.8B -> result	v7/A32/A64
 int8x16_t vaddq_s8(int8x16_t a, int8x16_t b)	a -> Vn.16B;b -> Vm.16B	ADD Vd.16B,Vn.16B,Vm.16B	Vd.16B -> result	v7/A32/A64
 int16x4_t vadd_s16(int16x4_t a, int16x4_t b)	a -> Vn.4H;b -> Vm.4H	ADD Vd.4H,Vn.4H,Vm.4H	Vd.4H -> result	v7/A32/A64